Power MOSFET device having low on-resistance and method

An IGFET structure comprising:

• a semiconductor substrate of a first conductivity type, wherein the semiconductor substrate forms a drain region;
• a semiconductor layer formed on the semiconductor substrate, wherein the semiconductor layer has a first major surface, and wherein the semiconductor layer forms an interface with the semiconductor substrate;
• a region of localized doping formed in the semiconductor layer, the region of localized doping comprising the first conductivity type and having a higher dopant concentration than the semiconductor layer, wherein the region of localized doping extends from the first major surface to the semiconductor substrate, and wherein the region of localized doping has width;
• first and second doped regions formed in the semiconductor layer and extending from the first major surface, wherein the first and second doped regions are spaced apart from the region of localized doping, and wherein the first and second doped regions have a second conductivity type;
• a first source region of the first conductivity type formed in the first doped region;
• a second source region of the first conductivity type formed in the second doped region;
• and
• a gate structure formed on the first major surface and having a gate width, wherein the width of the region of localized doping is sufficiently less than the gate width near the interface between the semiconductor substrate and the semiconductor layer such that the on state resistance is decreased without significantly impacting breakdown voltage.