PLL oscillator package and production method thereof

A method of producing a PLL oscillator, comprising the steps of:

• preparing said PLL oscillator including a piezoelectric resonator, an oscillating circuit for generating an oscillating signal in cooperation with said piezoelectric resonator, a phase locked loop circuit which operates using the oscillating signal provided from said oscillating circuit as a reference signal, an output circuit for outputting the signal generated by said phase locked loop circuit, a frequency selection terminal for selecting a frequency dividing ratio associated with a programmable frequency divider in said phase locked loop circuit, a programmable read only memory for storing data by which a state of said frequency selection terminal is determined, and writing means for writing said data, said piezoelectric resonator, said oscillating circuit, said phase locked loop circuit, said output circuit, said frequency selection terminal, said programmable read only memory and said writing means being placed in a sealed package, said frequency selection terminal having a portion extending outside said package, said PLL oscillator further comprising means for stopping an operation of said oscillating circuit and/or switching said output circuit into a high-impedance state, and said oscillating circuit, said phase locked loop circuit, and said output circuit being included in an IC, a control pad for stopping the operation of said oscillating circuit and a control pad for switching said output circuit into a high-impedance state being disposed on said IC, and at least one of said two control pads being connected via a bonded-wire to one lead terminal having a portion extending outside said package;
• and
• cutting off said frequency selection terminal after writing said data into said programmable read only memory.

A method of producing a PLL oscillator, comprising the steps of:

• preparing said PLL oscillator including a piezoelectric resonator, an oscillating circuit for generating an oscillating signal in cooperation with said piezoelectric resonator, a phase locked loop circuit which operates using the oscillating signal provided from said oscillating circuit as a reference signal, an output circuit for outputting the signal generated by said phase locked loop circuit, a programmable read only memory for storing a frequency dividing ratio of a programmable frequency divider in said phase locked loop circuit, and writing means for writing said frequency dividing ratio into said programmable read only memory, said piezoelectric resonator, said oscillating circuit, said phase locked loop circuit, said output circuit, said programmable read only memory and said writing means being placed in a scaled package, said PLL oscillator further including a writing terminal for writing said for writing terminal having a portion extending outside said package, and means for stopping an operation of said oscillating circuit and/or switching said output circuit into a high-impedance state, said oscillating circuit, said phase locked loop circuit, and said output circuit being included in an IC, a control pad for stopping the operation of said oscillating circuit and a control pad for switching said output circuit into a high-impedance state being disposed on said IC, and at least one of said two control pads being connected via a bonded-wire to one lead terminal having a portion extending outside said package;
• and
• writing said frequency dividing ratio into said programmable read only memory via said writing terminal.

A method of producing a PLL oscillator, comprising the steps of placing into a package in a sealed fashion components including a piezoelectric resonator, an oscillating circuit for generating an oscillating signal in cooperation with said piezoelectric resonator, a phase locked loop circuit which operates using the oscillating signal provided from said oscillating circuit as a reference signal, an output circuit for outputting the signal generated by said phase locked loop circuit, a programmable read only memory for storing the frequency dividing ratio of a programmable frequency divider in said phase locked loop circuit, and means for writing said frequency dividing ratio into said programmable read only memory, wherein the sealing of said package is performed in such a manner that said components are molded with a resin by injecting said resin into a mold from a first side of said package different from a second side of said package through which a writing terminal for writing said frequency dividing ratio extends outside said package, said PLL oscillator further comprising means for stopping an operation of said oscillating circuit and/or switching said output circuit into a high-impedance state, said oscillating circuit, said phase locked loop circuit, and said output circuit being included in an IC, a control pad for stopping the operation of said oscillating circuit and a control pad for switching said output circuit into a high-impedance state being disposed on said IC, and at least one of said two control pads being connected via a bonded-wire to one lead terminal having a portion extending outside said package.

A method of producing a PLL oscillator, comprising the steps of:

• placing into a package components including a piezoelectric resonator, an oscillating circuit for generating an oscillating signal in cooperation with said piezoelectric resonator, a phase locked loop circuit which operates using the oscillating signal provided from said oscillating circuit, and an output circuit for outputting the signal generated by said phase locked loop circuit, said PLL oscillator further comprising means for stopping an operation of said oscillating circuit and/or switching said output circuit into a high-impedance state, said oscillating circuit, said phase locked loop circuit, and said output circuit being included in an IC, a control pad for stopping the operation of said oscillating circuit and a control pad for switching said output circuit into a high-impedance state being disposed on said IC, and at least one of said two control pads being connected via a bonded-wire to one lead terminal having a portion extending outside said package;
• after placing said components into said package, adjusting a resonance frequency of said piezoelectric resonator;
• and
• sealing said package.

A PLL oscillator comprising a piezoelectric resonator, an oscillating circuit, a phase locked loop circuit which operates using an oscillation signal provided from said oscillating circuit as a reference signal, and an output circuit for outputting the signal generated by said phase locked loop circuit, said piezoelectric resonator, said oscillating circuit, said phase locked loop circuit and said output circuit being placed in a sealed package,

• the output frequency of said PLL oscillator being determined by a resonance frequency of said piezoelectric resonator and also by a frequency dividing ratio of a programmable frequency divider in said phase locked loop circuit,
• said PLL oscillator further comprising means for selecting the frequency dividing ratio of said programmable frequency divider so that said output frequency is set to a desired value,
• said PLL oscillator further comprising means for stopping an operation of said oscillating circuit and/or switching said output circuit into a high-impedance state,
• said oscillating circuit, said phase locked loop circuit, and said output circuit are included in an IC, and a control pad for stopping the operation of said oscillating circuit and a control pad for switching said output circuit into a high-impedance state are disposed on said IC, at least one of said two control pads being connected via a bonded-wire to one lead terminal having a portion extending outside said package.

A method of producing a PLL oscillator, comprising the steps of:

• preparing a PLL oscillator including a piezoelectric resonator, an oscillating circuit for generating an oscillating signal in cooperation with said piezoelectric resonator, a phase locked loop circuit which operates using the oscillating signal provided from said oscillating circuit as a reference signal, an output circuit for outputting the signal generated by said phase locked loop circuit, adjusting means for adjusting an oscillation frequency of said oscillating circuit with a capacitor array included in said oscillating circuit, and a fuse ROM for storing control data for controlling said capacitor array, said piezoelectric resonator, said oscillating circuit, said phase locked loop circuit, said output circuit, said adjusting means and said fuse ROM being placed in a sealed package, said PLL oscillator further including means for writing said control data into said fuse ROM after said package is sealed, and a writing terminal via which said control data is written, said writing terminal having a portion extending outside said package, and means for stopping an operation of said oscillating circuit and/or switching said output circuit into a high-impedance state, said oscillating circuit, said phase locked loop circuit, and said output circuit being included in an IC, a control pad for stopping the operation of said oscillating circuit and a control pad for switching said output circuit into a high-impedance state being disposed on said IC, and at least one of said two control pads being connected via a bonded-wire to one lead terminal having a portion extending outside said package;
• and
• cutting off said writing terminal after writing said control data.