Logical amplitude level conversion circuit, liquid crystal device and electronic apparatus
AssigneeSeiko Epson Corporation
InventorKenya Ishii
Life of this patent
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Abstract
A logic amplitude level converter circuit of the present invention includes voltage biasing means for obtaining a signal being amplified swinging relative to the logic threshold voltage of an output-stage buffer circuit in response to the high-low level change of an input signal having a low logic amplitude, a pulse amplifier circuit for obtaining a high logic amplitude signal by pulse-amplifying the signal being amplified, and the output-stage buffer circuit for obtaining an inverted signal of the high logic amplitude signal in response to the high logic amplitude signal as an input.
Claims23
A logic amplitude level converter circuit comprising:
- voltage biasing means obtaining a signal being amplified, the signal swinging relative to a logic threshold voltage of an output-stage buffer circuit as a reference, in response to a high-low level change of a low logic amplitude input signal;
- and
- a pulse amplifier circuit obtaining a high logic amplitude signal by pulse-amplifying the signal being amplified;
- the output-stage buffer circuit obtaining an inverted signal in response to the high logic amplitude signal as an input.
A logic amplitude level converter circuit including a voltage level converter circuit which converts an input signal of a relatively low logic amplitude into an output signal having a relatively high logic amplitude, and an output circuit for inverting the output signal from the voltage level converter circuit, the voltage level converter circuit comprising:
- a logic threshold value shift circuit that receives the input signal and generates a signal being converted, for causing the input signal to swing respect to a logic threshold voltage of the output circuit as a reference;
- and
- an amplifier circuit for amplifying the signal being converted.
A logic amplitude level converter circuit including a voltage level converter converting an input signal having a relatively low logic amplitude into an output signal having a relatively high logic amplitude, and an output circuit for inverting the output signal from the voltage level converter, the voltage level converter comprising:
- an input terminal for the input signal;
- a first transistor which inputs a logic threshold voltage of the output circuit to its gate;
- electrically parallel-connected second and third transistors that are electrically connected in series between the input terminal and the first transistor, a gate of the second transistor inputting the logic threshold voltage;
- an electrical node of the first transistor and the second transistor, a gate of the third transistor being connected to the electrical node;
- and
- an amplifier for converting an output from the electrical node into an output signal having the relatively high logic amplitude.
Dependencies are inferred from the claim text.