High current drain-to-gate clamp/gate-to-source clamp for external power MOS transistors
AssigneeTexas Instruments Incorporated
InventorsChris Cooper, Katherine Frank, David Baldwin
Life of this patent
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AssigneeTexas Instruments Incorporated
InventorsChris Cooper, Katherine Frank, David Baldwin
Estimating the term…
An external FET (12) has protection provided thereto for excessive voltages between the gate and drain and between the gate and source. A drain-to-gate clamp is provided with a plurality of series connected zener diodes (34), (36) and (38) which are connected in series with a Schottky diode (42). The current therethrough is sensed with a resistor (56) which turns on a bypass transistor (58) to shunt current around the zener diodes when an excess voltage causes them to break down. This will turn on the FET (12). The gate-to-source clamp is configured with two zener diodes (74) and (76) which are reversed biased. A series current sense resistor (82) senses the current through the diodes and turns on a transistor (84) when the current exceeds a predetermined level. This will effectively shunt current around the zener diodes (74) and (76).
A clamp circuit for being disposed between the gate and one of the source/drain terminals of an external transistor for preventing a large voltage from being impressed across the gate oxide of the external transistor, comprising:
A method for protecting the gate oxide in an external transistor, comprising the steps of:
A circuit, comprising:
Dependencies are inferred from the claim text.