Method and apparatus for storing location identification information within non-volatile memory devices

A digital system having a host, a controller device and at least one flash memory integrated circuit, the controller device being coupled between the host and the at least one flash memory integrated circuit for transferring information organized in blocks between the host and the at least one flash memory integrated circuit, each block having an associated logical block address (LBA) provided by the host to the controller device for identifying a block of information being accessed by the host, the controller device developing a physical block address (PBA) corresponding to each LBA for locating the block of information being accessed in one of the at least one flash memory integrated circuits comprising:

• a first buffer defined within one of the at least one flash memory integrated circuits;
• and
• a second buffer defined within one of the at least one flash memory integrated circuits, each of said first and second buffers being arranged in an array of M LBA rows where M is an integer, LBA rows of like locations in said buffers being assigned to a unique LBA, each LBA row of each buffer being used to store a plurality of PBAs,
• wherein said first buffer is designated as a primary buffer and said second buffer is designated as a secondary buffer, the primary buffer stores the most recent PBAs in each corresponding LBA row as each block is accessed, and when at least one of the LBA rows of the primary buffer is full, the secondary buffer stores the most recent PBAs in each corresponding LBA row while the PBA information in the primary buffer is transferred into the secondary buffer, upon completion of transfer of the most recent PBA information from the primary buffer to the secondary buffer, the designation of the first and second buffers being interchanged so that the second buffer is designated as the primary buffer and the first buffer is designated as the secondary buffer, the secondary buffer being erased, the primary buffer for storing the most recent PBAs in each corresponding LBA row as each block is accessed, and when at least one of the LBA rows of the primary buffer is full, the secondary buffer for storing the most recent PBAs in each corresponding LBA row while the PBA information in the primary buffer is transferred into the secondary buffer, thereafter the designation of said first and second buffers again being interchanged so that the first buffer is designated as the primary buffer and the second buffer is designated as the secondary buffer, wherein storage of PBA information is accordingly continuously swapped between said first buffer and said second buffer.

A digital system comprising:

• a host operative to develop host signals for transferring information organized in blocks, each block having an associated logical block address (LBA) for identifying the block;
• a controller device responsive to said host signals and operative to develop flash signals for transferring the blocks to and from the host;
• at least one flash memory integrated circuit responsive to said flash signals for developing a physical block address (PBA) corresponding to each LBA for storage in the at least one flash memory integrated circuit;
• a first and a second table defined within the at least one of the flash memory integrated circuit, each table arranged in an array of M LBA rows where M is an integer, LBA rows of like location in said tables being assigned to a unique LBA, each LBA row of each table for storing a plurality of PBAs.

A method of controlling reading and writing of information, organized in blocks, between a host and one or more flash memory devices, each of the blocks having associated therewith a logical block address (LBA) developed by the host and a corresponding physical block address (PBA) developed by the controller, comprising:

• (a) allocating storage space within each of the one or more flash memory devices to define a plurality of buffers, each of said buffers being arranged in an array of M LBA rows where M is an integer, each of said LBA rows being identified by a particular LBA with each of said rows identified by an LBA common to another buffer of said plurality of buffers, each said LBA row of each said buffer stores a plurality of PBAs;
• (b) designating one of said buffers having an LBA row identified by the common LBA as a primary buffer and the other of said buffers having an LBA row identified by the common LBA as a secondary buffer;
• (c) upon each access of a block of information, said one or more flash memory devices storing the PBA of the accessed block in an unused location of the primary buffer until at least one of the LBA rows of the primary buffer is full;
• and
• (d) storing the PBA in an unused location of the secondary buffer, wherein each stored PBA is accessed by the controller device to locate an addressed block of information within the flash memory devices for performing reading or writing to the addressed block.

In a digital information storage system having a controller device, one or more flash memory devices, and a host for transferring information organized in blocks to and from the one or more flash memory devices through the controller device, a method of storing address information for the blocks wherein each of the blocks has associated therewith a logical block address (LBA) developed by the host and a corresponding physical block address (PBA) developed by the controller, comprising:

• (a) allocating storage space within at least one of said one or more flash memory devices to define a buffer arranged in an array of M LBA rows where M is an integer, each of said rows being identified by a particular LBA and each of said LBA rows stores a plurality of PBAs;
• (b) upon writing of a block of information within said one or more flash memory devices, storing the PBA of the written block in an unused location within one of said LBA rows of the buffer;
• (c) storing for each LBA row, a tally value for indicating the position of the most recent PBA within the LBA row in which the tally value is stored;
• (d) upon one of the LBA rows of the buffer becoming substantially full, moving the contents of the buffer to a temporary location;
• (e) erasing the contents of the buffer;
• and
• (f) transferring the moved contents of the buffer from the temporary location back into the erased buffer;
• wherein each stored PBA may subsequently be accessed by the controller device to locate an addressed block of information within the flash memory devices.