Semiconductor device including lateral MOS element

A semiconductor device, comprising:

• a semiconductor substrate of a first conductive type;
• a first semiconductor layer of a second conductive type formed on said semiconductor substrate;
• a trench gate including an insulating film formed along a surface of a trench penetrating at least through said first semiconductor layer, and a gate electrode formed within the trench;
• a planar gate contacting with said trench gate;
• a second semiconductor layer of said first conductive type formed below said planar gate;
• a third semiconductor layer of said second conductive type formed in contact with said second semiconductor layer;
• and
• a buried gate facing said planar gate with said second semiconductor layer interposed between said planar gate with said buried gate.

A semiconductor device, comprising:

• an insulating layer formed on a substrate
• a first semiconductor layer of a second conductivity type formed on said insulating layer;
• a second semiconductor layer of a first conductivity type formed in said first semiconductor layer, and forming a channel region;
• a third semiconductor layer of a second conductivity type formed in said second semiconductor layer, and forming a source region;
• a fourth semiconductor layer of a second conductivity type formed in said first semiconductor layer, and forming a drain region;
• a trench gate including an insulating film formed along a surface of a trench which penetrates at least through said first semiconductor layer, and a gate electrode formed within the trench so as to fill the trench,
• wherein at least a bottom of said trench gate contacts with said insulating layer formed on said substrate.

A semiconductor device, comprising:

• an insulating layer formed on a semiconductor substrate;
• a first semiconductor layer of a second conductive type formed on said insulating layer;
• a trench gate including an insulating film formed along a surface of a trench penetrating at least through said first semiconductor layer, and a gate electrode formed within the trench;
• a planar gate contacting with said trench gate;
• a second semiconductor layer of a first conductive type formed below said planar gate;
• a third semiconductor layer of said second conductive type formed in contact with said second semiconductor layer;
• and
• a buried gate facing said planar gate with said second semiconductor layer interposed between said planar gate with said buried gate.