Calibration sharing for CMOS output driver
AssigneeHewlett-Packard Company
InventorsGerald L. Esch, Jr., Guy H. Humphrey
Life of this patent
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Abstract
A circuit for matching the impedance of a first array of transistors to an external resistor is used to produce a first set of control signals. This first set of control signals is used to control another array of transistors to replicate the impedance of the first array of transistors. This replicated impedance is then used by another circuit for matching impedance to produce a second set of control signals that control an array of transistor of a different type to match the impedance of the first two array. The two sets of control signals may then be used as calibration signals for the pull-up and pull-down transistors of multiple output drivers.
Claims10
A calibration circuit, comprising:
- a first set of calibration signals generated by a first feedback system;
- a second set of calibration signals generated by a second feedback system;
- a first transistor array wherein said first transistor array is controlled by said first set of calibration signals to match the impedance of a first resistor;
- and,
- a second transistor array wherein said second transistor array is controlled by said second set of calibration signals to match the impedance of a third transistor array wherein said third transistor array is controlled by said first set of calibration signals.
A method of producing a first set of calibration signals and a second set of calibration signals, comprising:
- producing said first set of calibration signals that control a first transistor array to match the impedance of a first resistor;
- producing said second set of calibration signals that control a second transistor array to match the impedance of a third transistor array;
- and,
- applying said first set of calibration signals to said third transistor array to control said third transistor array to match the impedence of said first transistor array.
A calibration circuit, comprising:
- a first feedback system producing a first set of calibration signals that control a first transistor array to match the impedance of a resistor;
- a second feedback system producing a second set of calibration signals that control a second transistor array to match a multiple of the impedance of said first transistor array.
Dependencies are inferred from the claim text.