Semiconductor device having lateral IGBT
AssigneeKabushiki Kaisha Toshiba
InventorsAkio Nakagawa, Tomoko Matsudai, Hideyuki Funaki, Norio Yasuhara
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AssigneeKabushiki Kaisha Toshiba
InventorsAkio Nakagawa, Tomoko Matsudai, Hideyuki Funaki, Norio Yasuhara
Estimating the term…
An n-type buffer layer and a p-type base layer are formed in the surface of the n.sup.- -type drift layer. A p.sup.+ -type drain layer is formed in the surface of the n-type buffer layer. An n.sup.+ -type source layer and a p.sup.+ -type contact layer are formed in the surface of the p-type base layer. A main gate electrode is arranged to face, through a gate oxide film, a surface of the p-type base layer which is interposed between the n.sup.+ -type source layer and the n.sup.- -type drift layer. An n-type relay layer is formed in the surface of the n.sup.- -type drift layer to face the n.sup.+ -type source layer through the p-type base layer under the main gate electrode. The n-type relay layer extends from the n.sup.- -type drift layer into the p-type base layer. The n-type relay layer decreases the channel resistance.
A semiconductor device having a lateral IGBT, said IGBT comprising:
A semiconductor device having a lateral IGBT, said IGBT comprising:
A semiconductor device having a lateral IGBT, said IGBT comprising:
A lateral IGBT comprising:
Dependencies are inferred from the claim text.