US 6,048,090 A · Error correction and concurrent verification of a product code

Abstract

A multi-layered error detection and correction (EDAC) system is disclosed for processing an error correction code (ECC) typically employed in optical disk storage devices. A first layer of the EDAC system includes a primary ECC, such as a multiple burst Reed-Solomon code, and a second layer incudes a secondary ECC, such as a CRC code, for use in verifying the validity of the corrections made using the primary ECC. The primary ECC is multi-dimensional and, in the embodiment disclosed herein, it is a two-dimensional P/Q product code typically employed in a CD-ROM storage device. The secondary ECC operates in unison with the primary ECC. As the EDAC system processes and corrects the data using the primary ECC, the EDAC system also simultaneously updates the secondary ECC. In this manner, when the EDAC system is finished processing the data using the primary ECC, the validation syndrome generated by the secondary ECC is available immediately for checking the validity of the corrections. Consequently, the additional pass otherwise required when no uncorrectable errors are encountered after completing a P or Q pass is obviated. To significantly increase the processing of the EDAC system, error-free code words are skipped during the iterative passes of the multi-dimensional primary ECC. When a code word is skipped, the validation syndrome generated using the secondary ECC is adjusted to account for the skipped data bytes.

Claims33

Dependent claims

A correction validator for validating corrections to an error correction code (ECC) made by an ECC decoder, wherein the ECC code is a multi-dimensional code comprised of a first set of code words that intersect with a second set of code words, the ECC decoder process the first and second set of code words in iterative passes, and the ECC decoder skips a code word if a predetermined condition is satisfied, the correction validator comprises:

(a) at least one register for storing a validation value computed in response to data in the multi-dimensional code and computed proximate in time to when the ECC decoder processes the data in the multi-dimensional code;
(b) an offset controller for adjusting the validation value according to an offset value when the ECC decoder skips a code word in the multi-dimensional code;
and
(c) a comparator for comparing a final validation value to a predetermined value when the ECC decoder finishes processing the multi-dimensional code, wherein a result of the comparison indicates whether corrections made by the ECC decoder are valid.

1 more element

An error detection and correction (EDAC) system for correcting errors in a multi-dimensional error correction code (ECC) comprised of a first set of code words that intersect with a second set of code words, the EDAC system comprising:

(a) a data buffer for storing the first and second set of code words of the multi-dimensional code;
(b) an ECC decoder for reading from the buffer the first and second set of code words in iterative passes, wherein the ECC decoder does not read a code word from the buffer if a predetermined condition is satisfied;
(c) at least one register for storing a validation value computed in response to data in the multi-dimensional code and correction values generated by the ECC decoder, wherein the validation value is computed proximate in time to when the ECC decoder reads the data of the multi-dimensional code from the buffer;
(d) an offset controller for adjusting the validation value according to an offset value when the ECC decoder does not read a code word in the multi-dimensional code from the buffer;
and
(e) a comparator for comparing a final validation value to a predetermined value when the ECC decoder finishes processing the multi-dimensional code, wherein a result of the comparison indicates whether corrections made by the ECC decoder are valid.

3 more elements

Dependencies are inferred from the claim text.

Error correction and concurrent verification of a product code

Life of this patent

Error correction and concurrent verification of a product code

Life of this patent

Abstract

Claims33