Parallel HV MOSFET high power stable amplifier

A high power grounded-drain source follower RF amplifier circuit which comprises an input terminal;

• a supply of DC voltage;
• an output circuit;
• and a high power, high voltage large-chip transistor which includes a thermally and electrically conductive flange having an upper surface, and a semiconductor transistor die having a lower surface, with a drain of the die being formed over a major portion of said lower surface, said drain being in direct electrical and thermal contact with said flange, a source and a gate formed respectively on said die away from said flat lower surface, said output circuit being coupled to said source;
• and a DC-isolated input stage between said input terminal and said gate and which is floating with respect to said drain;
• wherein said input stage includes an isolation transformer having a primary winding connected to said input terminal and an isolated secondary winding having first and second ends coupled respectively to said gate and said source.

A high power push-pull RF amplifier for amplifying RF power in a given frequency band, comprising an RF input terminal, an RF output terminal, a power source, first and second kilowatt power transistor devices, each said kilowatt power transistor device including a thermally and electrically conductive flange, a multi-chip array formed of a four semiconductor dies, each said die having a flat lower surface with a drain formed over a majority of said lower surface, a source and a gate formed respectively on portions of the die away from said flat lower surface, and means for seating the drains of the dies in direct thermal and electrical contact with said flange so that said flange serves as drain terminal and as heat sink for said dies;

• first splitter means coupled to said RF input terminal for splitting an RF input drive signal into a forward phase portion and a reverse phase portion;
• second splitter means for splitting said forward phase portion of the drive signal into a plurality of isolated signals for supplying to the gates of said first kilowatt power transistor device;
• third splitter means for splitting said reverse phase portion into a plurality of isolated signals for supplying to the gates of said second kilowatt power transistor device;
• for each of said semiconductor die of said first kilowatt power transistor device a respective gate-source input circuit which is RF coupled to an associated output of said second splitter means and which is floating with respect to the flange of said first kilowatt power transistor device;
• for each said semiconductor die of said second kilowatt power transistor device a respective gate-source input circuit which is RF coupled to an associated output of said third splitter means but is floating with respect to the flange of said second kilowatt power transistor device;
• combiner means having inputs coupled to the sources of said first and second kilowatt power transistor devices for combining amplified RF outputs therefrom to supply an amplified RF signal to said RF output terminal;
• a supply of DC source voltage;
• and DC feed means connecting the sources of said kilowatt power transistor devices to said supply of DC voltage, said DC feed means including choke means for blocking said amplified RF signal from said supply of DC voltage, and means for bypassing RF energy, wherein the four dies of each said kilowatt power transistor device are paralleled externally, and are DC matched so that their gate-source thresholds are matched to within 0.2 volt, their drain-source on resistances are matched within 8%, and their forward transconductances are within 1 Siemans.