Semiconductor package

A power semiconductor package, comprising:

• a bottom leadframe having a bottom plate portion and at least one first terminal extending from the bottom plate portion;
• at least one second terminal being co-planar with the first terminal;
• a semiconductor power MOSFET die having a top surface on which a first metalized region defining a source and a second metalized region defining a gate are disposed, the top surface further including a gate bus extending over portions of the source, the MOSFET die further including a bottom surface defining a drain connection coupled to the bottom plate of the leadframe such that the first terminal is electrically connected to the drain;
• a nitride layer substantially covering at least a portion of the gate bus;
• a layer of curable conductive material disposed atop the nitride layer and the source;
• a copper plate coupled to and spanning a substantial part of the source and covering substantially all of the gate bus, the curable conductive material electrically coupling the copper plate to the source but being electrically insulated from the gate bus via the nitride layer;
• at least one beam portion being sized and shaped to couple the copper plate portion to the at least one second terminal such that it is electrically coupled to the source;
• and
• a wire bond coupling the gate to a third terminal.