Semiconductor device

A semiconductor device comprising a chip including a logic circuit having a MISFET which is selectively operated under an active condition or a standby condition, a first voltage supply node for giving a voltage, which is lower than a ground voltage, corresponding to the standby condition, a second voltage supply node for giving a voltage, which is higher than a power supply voltage, corresponding to the active condition, a switching circuit for selecting either one of the first and second voltage supply nodes to give the voltage thereof a substrate or a body electrode of the MISFET in the logic circuit, wherein

• the switching circuit comprising a p-type MISFET and an n-type MISFET, the first voltage supply node being connected to one of a source and a drain of the n-type MISFET, and the second voltage supply node being connected to one of a source and a drain of the p-type MISFET, and
• the others of the sources and the drains of the n-type MISFET and the p-type MISFET being commonly connected to the substrate or the body electrode of the MISFET in the logic circuit, gates of the p-type MISFET and the n-type MISFET being commonly connected to a control input terminal for control of the two conditions, i.e., the active condition and the standby condition, and voltages at the control input terminal being within a range from a ground voltage of the logic circuit to a power supply voltage thereof.

A semiconductor device comprising:

• a chip in which first and second MISFETs and a voltage supply node are formed, wherein
• a gate and a well electrode, or the gate or a body electrode of the first MISFET being connected to each other, a source of the first MISFET and a drain of the second MISFET being connected to each other, a source of the second MISFET being connected to a current supply node,
• a well or a body electrode of the second MISFET being connected to the voltage supply node and being able to fall in at least two stationary conditions during standby state and during active state, V.sub.th and V.sub.ths being set to satisfy V.sub.th <V.sub.ths wherein V.sub.ths represents the threshold voltage during standby state of the second MISFET and V.sub.th represents the threshold voltage of the first MISFET, and
• the voltage of a gate of the second MISFET being able to fall in at least two stationary conditions during standby state and active state, the second MISFET becoming a cut-off state during standby state, and the second MISFET becoming conductive as active state.