US 6,031,843 AGranted

Digital communications switching fabric

AssigneeAlcatel Data Networks Inc.

InventorsAdam R. Swanbery, Christian Collin Dit de Montesson, Michel Accarion, David E. Williamson, Perry W. Makris, Jonathan B. White, Jean-Claude Brethome

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Abstract

A type of switching fabric for exchanging variable-size frames of digital information between frame processors coupled directly or indirectly to one or more digital communication lines. It comprises one or more multi-line serial communication controllers (MSCCs), and a backplane providing a full mesh of serial point-to-point bi-directional links between each MSCC, and, in a loopback, from each MSCC back to itself. The MSCCs collectively manage the transfer of variable-size frames between the frame processors. To transfer digital information from a source line to a destination line, a frame processor coupled to the ingress line drives the switching fabric by signaling its MSCC that there is information. The ingress MSCC then switches the digital information through the backplane to the MSCC serving the frame processor coupled to the egress line. The switching fabric uses a clocking scheme that makes possible high throughput rates.

Claims24

Dependent claims

A switching fabric (20), for switching frames of digital information as a sequence of buffers, each buffer containing a portion of each of the frames to be switched, for use in a switch system (10) having a plurality of processor means for receiving and transmitting frames, each said processor means coupled to at least one bi-directional digital communication line (14, 15), the switch system for switching frames between digital communication lines coupled to said processor means, the switching fabric comprising:

a) a plurality of multi-line serial communication controllers, MSCCs, (16, 16a), each connected to at least one processor means, each MSCC having means for receiving from, and outputting to, the processor means the sequence of buffers;
and
b) a backplane (13) connected to each MSCC through a plurality of connections (22) so as to interconnect every MSCC of the switching fabric in a full mesh of bi-directional serial point-to-point links, the backplane for receiving from an MSCC the sequence of buffers and for providing said sequence of buffers to a corresponding MSCC connected to the processor means that is coupled to the destination digital communication line;
wherein, for each buffer, the MSCC providing the sequence of buffers to the backplane first sends a transfer request over the backplane to the MSCC coupled to the destination digital communication line, and does not transfer the buffer until the transfer request is accepted.

1 more element

A switching fabric (20), for switching frames of digital information as a sequence of buffers, for use in a switch system (10) having a plurality of frame processors (17), each with an associated RAM, and each frame processor (17) coupled to a plurality of digital communication lines (14, 15), the switching fabric comprising:

a) a plurality of multi-line serial communication controllers, MSCCs, (16, 16a), each of which can serve as either an ingress MSCC or an egress MSCC, an ingress MSCC for inputting frames of digital information into the switching fabric, and an egress MSCC for outputting from the switching fabric frames of digital information, each MSCC attached to at least one frame processor and the frame processor's associated RAM through a local bus, for receiving from, and outputting to, the frame processor through its associated RAM the sequence of buffers, each MSCC also connected directly to each attached frame processor for signaling interrupts;
and
b) a backplane (13) connected to each MSCC through a plurality of connections (22) so as to interconnect every MSCC of the switching fabric in a full mesh of bi-directional serial point-to-point links, and so as to connect, in a loopback, each MSCC to itself, the backplane for receiving from an ingress MSCC the sequence of buffers and for providing said sequence of buffers to an egress MSCC;
wherein, for each buffer, the ingress MSCC first sends to the egress MSCC a transfer request, and does not transfer the buffer until the transfer request is accepted.

1 more element

Dependencies are inferred from the claim text.

Facts

Application: 08/754,395Filed 21 Nov 1996
Granted: 29 Feb 2000
Term ends: Not estimatedThe source records don’t support an estimate.

Classification13 codes

H04L 49/1584
Interconnection of ATM switching modules, e.g. ATM switching fabrics: full Mesh, e.g. knockout
H04L 49/115
Arrangements for redundant switching, e.g. using parallel planes: transferring a complete packet or cell through each plane
H04L 49/30
Packet switching elements: peripheral units, e.g. input or output ports
H04L 49/3081
Peripheral units, e.g. input or output ports: aTM peripheral units, e.g. policing, insertion or extraction