Ferroelectric memory with increased switching voltage

A ferroelectric integrated circuit memory comprising:

• a memory cell comprising a ferroelectric memory element;
• a bit line;
• a word line;
• a plate line, and a precharge signal line;
• a first switch connected to said word line for electrically connecting said bit line and said ferroelectric memory element in response to a word signal on said word line and for electrically disconnecting said bit line and said ferroelectric memory element when said word signal is terminated;
• a current source/sink;
• a second switch connected to said precharge signal line for electrically connecting said bit line and said current source/sink in response to a precharge signal on said precharge signal line and electrically disconnecting said bit line and said current source/sink when said precharge signal is terminated;
• and
• a signal generator for, during a single read cycle, providing said precharge signal, then said word signal, and subsequently terminating said precharge signal.

A ferroelectric integrated circuit memory comprising:

• a memory cell comprising a ferroelectric memory element;
• a sense line electrically connected to or connectable to said ferroelectric memory element;
• and
• a current source/sink electrically connectable to said sense line for removing electric charge from said sense line while said sense line is electrically connected to said ferroelectric memory element.

A ferroelectric integrated circuit memory comprising:

• a memory cell comprising a ferroelectric memory element;
• a conducting line connected to or connectable to said ferroelectric memory element;
• a precharge signal line;
• a current source/sink;
• a switch connected to said precharge signal line for electrically connecting said conducting line and said current source/sink in response to a precharge signal on said precharge signal line and electrically disconnecting said conducting line and said current source/sink when said precharge signal is terminated;
• and
• a signal generator for generating a precharge signal that is boosted above the supply voltage of said memory.

A method of reading a ferroelectric integrated circuit memory element having two electrical terminals;

• said method comprising the steps of:
• connecting a first line at a first voltage to one of said terminals of said ferroelectric memory element while a second voltage is applied to the other terminal of said ferroelectric memory element to create a voltage across said ferroelectric memory element and to cause linear displacement current to flow from said ferroelectric memory element to said first line;
• increasing the voltage across said ferroelectric memory element by drawing off at least a portion of said linear displacement current from said first line;
• and
• completing the reading of said ferroelectric memory element.

A method of creating an increased switching voltage across a ferroelectric memory element in a ferroelectric memory, said ferroelectric memory element having two terminals, said method comprising the steps of:

• connecting a bit line to a current source/sink via a precharge transistor having a gate;
• applying a precharge signal to said gate, said precharge signal being boosted above the supply voltage of said memory;
• and
• connecting said bit line to one of said electrodes of said ferroelectric memory element while a second voltage is applied to the other electrode of said ferroelectric memory element to create said switching voltage across said ferroelectric memory element.

A method of creating an increased switching voltage across a ferroelectric memory element in a ferroelectric memory, said ferroelectric memory element having two terminals, said method comprising the steps of:

• connecting a conducting line to a current source/sink via a precharge switch to remove charge from said conducting line;
• connecting said conducting line to one of said terminals of said ferroelectric memory element while a second voltage is applied to the other terminal of said ferroelectric memory element to create said switching voltage across said ferroelectric memory element;
• and then
• disconnecting said conducting line from said current source/sink and stopping the removal of charge from said conducting line before any significant amount of the ferroelectric material switches.