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US 6,028,365 AGranted
Integrated circuit package and method of fabrication
AssigneeMicron Technology, Inc.
InventorsSalman Akram, Warren M. Farnworth
Life of this patent
Estimating the term…
Abstract
The present invention is directed to a semiconductor package and its method of manufacture. Conductors mounted on a flexible polymer tape are used to connect a semiconductor chip to a substrate. The flexible polymer tape can be folded back under the chip to reduce the size necessary for mounting the assembly to almost that of the chip itself. The polymer tape also provides flexibility to reduce stresses on the electrical connections caused by thermal expansion and compression. Additionally, the present invention allows for the stacking of semiconductor chips on top of one another, reducing signal propagation delays between them.
Claims27
A semiconductor package comprising:
- a semiconductor die having a plurality of bond pads;
- at least one piece of a polymer tape having a first end and a second end and having a plurality of conductors thereon, each of said plurality of conductors being connected to one of said plurality of bond pads at said first end of said polymer tape;
- wherein said at least one piece of polymer tape is secured at said first end thereof to a first surface of said semiconductor die and is folded back on said semiconductor die such that said second end is positioned below said semiconductor die;
- a first adhesive to secure said second end of said at least one piece of polymer tape to a bottom surface of said semiconductor die;
- a plurality of contacts on said polymer tape at said second end for connection to a substrate;
- and
- a second adhesive used to secure said at least one piece of polymer tape to said substrate,
- wherein said second adhesive has a lower adhesion release temperature than said first adhesive.
5 more elements
A semiconductor package comprising:
- a plurality of semiconductor dies, each having a plurality of bond pads;
- a plurality of pieces of polymer tapes, each having a plurality of conductors thereon connected to said plurality of bond pads of one of said plurality of semiconductor dies;
- a first support upon which said plurality of semiconductor dies are mounted;
- and
- a second support having a top surface and a bottom surface, said first support being mounted to said top surface of said second support such that said bond pads of said plurality of semiconductor dies face said top surface of said second support,
- wherein said plurality of pieces of polymer tape are folded back under said second support, said plurality of conductors being connected to conductors of a substrate.
3 more elements
A semiconductor package comprising:
- a semiconductor die having a plurality of bond pads;
- at least one piece of a flexible interconnect, each having a first end and a second end, and a plurality of conductors on a first side extending substantially from said first end to said second end;
- and
- a support, having a top surface and a bottom surface, each of said at least one piece of flexible interconnect having said first end secured to said top surface with said conductors facing away from said top surface and folded back under said support such that conductors face away from said bottom surface of said support,
- wherein said plurality of bond pads of said semiconductor die are electrically connected to said plurality of conductors facing away from said top surface of said support, and said conductors facing away from said bottom surface of said support are connected to conductors of a substrate.
2 more elements
A semiconductor package comprising:
- a first semiconductor die having a plurality of bond pads;
- a second semiconductor die having a plurality of bond pads;
- a first support having a top surface and a bottom surface;
- a second support having a top surface and a bottom surface;
- a first plurality of pieces of polymer tape each having a first end and a second end, with a plurality of conductors on a first side extending substantially from said first end to said second end, said first ends of said first plurality of pieces of polymer tape secured to said top surface of said first support such that said plurality of conductors face away from said top surface of said first support, said plurality of pieces of polymer tape being folded back under said first support with said second end of said plurality of pieces of polymer tape being secured to said bottom surface of said first support,
- wherein said plurality of bond pads of said first semiconductor are connected to at least a portion of said plurality of conductors facing away from said top surface of said first support;
- a second plurality of pieces of polymer tape, each having a first end and a second end with a plurality of conductors on a first side extending substantially from said first end to said second end, said first ends of said second plurality of pieces of polymer tape secured to said top surface of said second support such that said conductors face away from said top surface of said second support, said second plurality of pieces of polymer tape being folded back under said second support with said second ends of said second plurality of pieces of polymer tape being secured to said bottom surface of said second support,
- wherein said plurality of bond pads of said second semiconductor die are connected to said conductors facing away from said top surface of said second support, and said second support is mounted above said first semiconductor die such that said conductors facing away from said bottom surface of said second support are connected to at least a portion of said conductors facing away from said top surface of said first support, and said conductors facing away from said bottom surface of said first support are connected to conductors of a substrate.
5 more elements
A semiconductor package comprising:
- a first semiconductor die secured to a first support;
- and
- a second semiconductor die secured to a second support mounted above said first semiconductor die,
- wherein signals between said first semiconductor die and said second semiconductor die are carried by a plurality of conductors on a plurality of pieces of polymer tape secured to said first and second supports.
1 more element
A processor system comprising:
- a central processing unit;
- and
- a memory device connected to said central processing unit, said memory device comprising a plurality of semiconductor packages, said semiconductor packages comprising a plurality of semiconductor dies, each having a plurality of bond pads;
- a plurality of pieces of polymer tape, each having a plurality of conductors thereon connected to said plurality of bond pads of one of said plurality of semiconductor dies;
- a first support upon which said plurality of semiconductor dies are mounted;
- and
- a second support having a top surface and a bottom surface, said first support being mounted to said top surface of said second support such that said bond pads of said plurality of semiconductor dies face said top surface of said second support,
- wherein said plurality of pieces of polymer tape are folded back under said second support, said plurality of conductors being connected to conductors of a substrate.
5 more elements
A processor system comprising:
- a central processing unit;
- and
- a memory device connected to said central processing unit, said memory device comprising a plurality of semiconductor packages, said semiconductor packages comprising a semiconductor die having a plurality of bond pads;
- at least one piece of a flexible interconnect, each having a first end and a second end, and a plurality of conductors on a first side extending substantially from said first end to said second end;
- and
- a support, having a top surface and a bottom surface, each of said at least one piece of flexible interconnect having said first end secured to said top surface with said conductors facing away from said top surface and folded back under said support such that conductors face away from said bottom surface of said support,
- wherein said plurality of bond pads of said semiconductor die are electrically connected to said plurality of conductors facing away from said top surface of said support, and said conductors facing away from said bottom surface of said support are connected to conductors of a substrate.
4 more elements
A processor system comprising:
- a central processing unit;
- and
- a memory device connected to said central processing unit, said memory device comprising a plurality of semiconductor packages, said semiconductor packages comprising a first semiconductor die secured to a first support;
- and
- a second semiconductor die secured to a second support mounted above said first semiconductor die,
- wherein signals between said first semiconductor die and said second semiconductor die are carried by a plurality of conductors on a plurality of pieces of a flexible interconnect secured to said first and second supports.
3 more elements
Dependencies are inferred from the claim text.