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AssigneeSamsung Electronics Co., Ltd.
InventorGyu-hong Kim
Estimating the term…
Integrated circuit memory devices include a pair of complementary input/output lines (IO and /IO), a pair of complementary data lines (DATA and /DATA) and a driver circuit which is responsive to a driver signal (PDT) and drives the pair of complementary input/output lines with complementary data from the pair of complementary data lines when the driver signal is in an enabled state (e.g., logic 1). A precharge circuit is also provided. This precharge circuit, which is responsive to a precharge control signal (PIOPR) and the driver signal (PDT), precharges the pair of complementary input/output lines IO and /IO during a precharge time interval which precedes the generation of a column select signal (CSL). The precharge time interval commences when the driver signal (PDT) and the precharge control signal (PIOPR) are in disabled and enabled states, respectively, at the same time. The precharge time interval also terminates upon transition of the driver signal (PDT) from its disabled state to an enabled state, even if the precharge control signal remains in its enabled state.
An integrated circuit memory device, comprising:
An integrated circuit memory device, comprising:
A method of operating an integrated circuit memory device, comprising the steps of:
Dependencies are inferred from the claim text.