Chip-scale carrier for semiconductor devices including mounted spring contacts

Semiconductor assembly, comprising:

• a semiconductor die having bond pads on a surface thereof;
• a carrier substrate mounted to the surface of the semiconductor die, and having terminals on a surface thereof;
• bond wires extending between the bond pads and the terminals and further extending contiguously as free-standing wire stems from the surface of the carrier substrate, away from the surface of the semiconductor die;
• and
• at least one layer of an electrically conductive material overcoating at least the free-standing wire stems;
• each free-standing wire stem with overcoating including:
• an elongate element, of a first material, having a portion connected to a respective terminal of the substrate;
• and
• a second material, on the elongate element, wherein the elongate element is flexible without the second material, and the elongate element and the second material together are resilient.

Chip-scale carrier, comprising:

• a multi-layer substrate including at least a first insulating layer, a first conductive layer patterned to have individual conductive lines disposed atop the first insulating layer, a second insulating layer disposed atop the first conductive layer, and a second conductive layer patterned to have individual conductive lines disposed atop the second insulating layer;
• wherein:
• the second insulating layer is generally centrally located upon the first conductive layer and is sized to permit two end portions of each of the individual conductive lines of the first conductive layer to be exposed at corresponding two side edges of the second insulating layer;
• and
• each of the individual conductive lines of the second conductive layer have two end portions;
• further comprising:
• a first plurality of spring elements extending from one end portion of the conductive lines of the first conductive layer;
• and
• a second plurality of spring elements extending from one end portion of the conductive lines of the second conductive layer.