Apparatus and method for recording a floating point error pointer in zero cycles
AssigneeIntergrated Device Technology, Inc.
InventorsG. Glenn Henry, Terry Parks
Life of this patent
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AssigneeIntergrated Device Technology, Inc.
InventorsG. Glenn Henry, Terry Parks
Estimating the term…
An apparatus and method for recording a floating point macro instruction error pointer within a microprocessor is provided. The apparatus includes translation/control logic for generating a micro instruction sequence to perform a floating point operation. The micro instruction sequence includes a first micro instruction, inserted in the sequence in place of a translate slip, which directs the microprocessor to store a first part of the floating point macro instruction error pointer associated with a floating point macro instruction. The micro instruction sequence also includes a micro instruction extension, associated with a floating point micro instruction within the sequence. The extension directs the microprocessor to store a second part of the floating point macro instruction error pointer. The error pointer is stored in zero effective time increments without requiring additional hardware.
An apparatus for recording a floating point macro instruction error pointer in a microprocessor, comprising:
A microprocessor for saving a floating point unit environment, comprising:
A method for saving a floating point macro instruction exception pointer in a microprocessor, the method comprising:
Dependencies are inferred from the claim text.