# US 6,014,586 A · Vertically integrated semiconductor package for an implantable medical device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 6,014,586 A - Document ID: US6014586A - Status: Granted - Kind: A - Application number: 08/806,364 - Filed: 1997-02-27 - Granted: 2000-01-11 - Earliest claimed: 1995-11-20 - Assignees: Pacesetter, Inc. - Inventors: Alvin H. Weinberg; Buehl E. Truex - Web page: https://patentgrep.com/patent/US6014586A ## CPC - A61N 1/3758: {Packaging of the components within the casing} - A61N 1/375: Constructional arrangements, e.g. casings - H10W 90/00: Package configurations - H10W 72/5449: {not being orthogonal to a side surface of the chip, e.g. fan-out arrangements} - H10W 72/5473: {multiple bond wires connected to a common bond pad} - H10W 72/5522: {comprising gold [Au]} - H10W 90/732: {between stacked chips} - H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL} - A61N: ELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY (measurement of bioelectric currents A61B; surgical instruments, devices or methods for transferring non-mechanical forms of energy to or from the body A61B18/00; anaesthetic apparatus in general A61M; incandescent lamps H01K; infrared radiators for heating H05B) - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract An electronic package having vertically integrated components placed upon a substrate surface is configured to increase packing density of the components. Integrated circuits which are vertically-stacked and attached to the substrate surface communicate with surrounding components through connection to bond pads on the substrate surface. The bond pads can be placed entirely about a perimeter of the integrated circuits to achieve optimal packing density. Individual bond pads may be shared by two or more integrated circuits by connection therewith. In an alternative embodiment, a separate integrated circuit is attached to the substrate adjacent to the stacked integrated circuits with a row of shared bond pads positioned therebetween. Individual passive or active components may be placed between bond pads for incorporation into the circuit structure. ## Claims ### Claim 1 An implantable cardiac stimulation device, comprising: electronic circuitry for generating cardiac stimulation pulses in at least one of the absence or presence of certain cardiac events, said electronic circuitry comprising: a first integrated circuit chip having a first array of signal contact pads disposed thereon; a second integrated circuit chip having a second array of signal contact pads disposed thereon; a substrate having a first predefined die-attach area located on a surface of said substrate, said first integrated circuit chip being mounted on said first predefined die-attach area on said surface, said substrate also having a first plurality of bond pads located thereon adjacent said first predefined die-attach area, said second integrated circuit chip being vertically stacked upon said first integrated circuit chip; a first plurality of wirebonds, each one of said first plurality of wirebonds extending between a selected one of said first array of signal contact pads to a selected one of said first plurality of bond pads providing electrical communication therebetween; a second plurality of wirebonds, each one of said second plurality of wirebonds extending between a selected one of said second array of signal contact pads to a selected one of said first plurality of bond pads providing electrical communication therebetween, wherein at least one of said first plurality of bond pads is commonly shared by one of said first plurality of wirebonds and at least one of said second plurality of wirebonds whereby electrical comminication is enabled between said first and second integrated circuit chips via said shared bond pads in said first plurality of bond pads; at least one additional circuit component extending between and electrically connected to two of said bond pads in said first pluralities of bond pads; and a housing for hermetically sealing said electronic circuitry therein. ### Claim 2 (depends on 1) The implantable cardiac stimulation device as defined in claim 1, wherein said first and second integrated circuit chips are secured together with a nonconductive bonding material. ### Claim 3 (depends on 2) The implantable cardiac stimulation device as defined in claim 2, wherein said nonconductive bonding material comprises a preformed adhesive segment placed between said first and second integrated circuit chips. ### Claim 4 (depends on 2) The implantable cardiac stimulation device as defined in claim 2, wherein nonconductive bonding material comprises a nonconductive epoxy resin. ### Claim 5 (depends on 1) The implantable cardiac stimulation device as defined in claim 1, wherein said first array of signal contact pads on said first integrated circuit chip is in approximate alignment with said second array of signal contact pads on said second integrated circuit chip. ### Claim 6 (depends on 1) The implantable cardiac stimulation device as defined in claim 1, wherein said at least one additional circuit component comprises a circuit component selected from the group consisting of active circuit components and passive circuit components. ### Claim 7 (depends on 1) The implantable cardiac stimulation device as defined in claim 1, wherein said at least one additional circuit component comprises a circuit component selected from the group consisting of diodes, resistors, and capacitors. ### Claim 8 (depends on 1) The implantable cardiac stimulation device as defined in claim 1, wherein said substrate has a second predefined die-attach area located on said surface of said substrate adjacent to said first predefined die-attach area, said electronic circuitry further comprising: a third integrated circuit chip mounted on said second predefined die-attach area on said substrate adjacent to said vertically-stacked first and second integrated circuit chips, said third integrated circuit chip having a third array of signal contact pads disposed thereon, said substrate also having a second plurality of bond pads located thereon adjacent said second die-attach area, wherein the ones of said first and second pluralities of bond pads which are located between said first and second die-attach areas define a single row of bond pads common to said first and second pluralities of bond pads; a third plurality of wirebonds, each one of said third plurality of wirebonds extending between a selected one of said signal contact pads on said third array of signal contact pads to a selected one of said bond pads on said common row of bond pads providing electrical connection therebetween; fourth plurality of wirebonds, each one of said fourth plurality of wirebonds extending between a selected one of said signal contact pads on one of said first or second arrays of signal contact pads to a selected one of said bond pads on said common row of bond pads, wherein at least one of said bond pads in said common row is commonly shared by one of said third plurality of wirebonds and at least one of said fourth plurality of wirebonds whereby electrical communication is enabled between said third integrated circuit chip and at least one of said first and second integrated circuit chips via said shared bond pads in said common row of bond pads. ### Claim 9 (depends on 8) The implantable cardiac stimulation device as defined in claim 8, wherein a first one of said first, second, and third integrated circuit chips comprises a memory chip, a second one of said first, second, and third integrated circuit chips comprises a digital logic chip, and a third one of said first, second, and third integrated circuit chips comprises an analog chip. ### Claim 10 (depends on 9) The implantable cardiac stimulation device as defined in claim 9, wherein said memory chip has a control program stored therein, and wherein said analog chip includes sense amplifier circuitry and pulse generating circuitry therein, said analog chip being controlled by said digital logic chip based on said stored control program in said memory chip; and wherein said sense amplifier and pulse generator circuitry of said analog chip electrically communicate to said digital logic chip via third and fourth wirebonds. ### Claim 11 (depends on 9) The implantable cardiac stimulation device as defined in claim 9, wherein said first integrated circuit chip comprises said memory chip, said second integrated circuit chip comprises said digital logic chip, and said third integrated circuit chip comprises said analog chip. ### Claim 12 (depends on 8) The implantable cardiac stimulation device as defined in claim 8, wherein said electronic circuitry comprises sensing circuitry for sensing cardiac events and pulse generating circuitry for generating cardiac stimulation pulses, and wherein a first one of said first, second, and third integrated circuit chips comprises a memory chip having a control program stored therein, a second one of said first, second, and third integrated circuit chips comprises a processor chip for controlling the operation of said implantable cardiac stimulation device based on said stored control program, and a third one of said first, second, and third integrated circuit chips comprises a chip having said sense amplifier circuitry and said pulse generating circuitry incorporated therein, wherein said first, second and third integrated circuit chips electrically communicate via said first, second, third and fourth wirebonds. ### Claim 13 (depends on 1) The implantable cardiac stimulation device as defined in claim 1, further comprising: a third integrated circuit chip vertically stacked upon said second integrated circuit chip, said third integrated circuit chip having a third array of signal contact pads disposed thereon; and a third plurality of wirebonds, each one of said third plurality of wirebonds extending between a selected one of said third array of signal contact pads to a selected one of said first plurality of bond pads. ### Claim 14 (depends on 13) The implantable cardiac stimulation device as defined in claim 13, wherein said first array of signal contact pads on said first integrated circuit chip is in approximate alignment with said second array of signal contact pads on said second integrated circuit chip, and wherein said third array of signal contact pads on said third integrated circuit chip is in approximate alignment with one of said first and second arrays of signal contact pads. ### Claim 15 An implantable cardiac stimulation device, comprising: electronic circuitry for generating cardiac stimulation pulses in at least one of the absence or presence of certain cardiac events, said electronic circuitry comprising: a first integrated circuit chip having a first array of signal contact pads disposed thereon; a second integrated circuit chip having a second array of signal contact pads disposed thereon; a third integrated circuit chip having a third array of signal contact pads disposed thereon; a substrate having adjacent first and second predefined die-attach areas located on a surface of said substrate, said substrate also having a first plurality of bond pads located thereon adjacent said first predefined die-attach area and a second plurality of bond pads located thereon adjacent said second predefined die-attach area, said first and second pluralities of bond pads together comprising a single row of bond pads located between said first and second predefined die-attach areas and common to said first and second pluralities of bond pads, said first integrated circuit chip being mounted on said first predefined die-attach area on said surface of said substrate, said second integrated circuit chip being vertically stacked upon said first integrated circuit, chip and said third integrated circuit chip being mounted on said second predefined die-attach area on said surface of said substrate; a first plurality of wirebonds, each one of said first plurality of wirebonds extending between a selected one of said signal contact pads on said first array of signal contact pads to a selected one of said bond pads on said common row of bond pads providing electrical connection therebetween; a second plurality of wirebonds, each one of said second plurality of wirebonds extending between a selected one of said signal contact pads on said second array of signal contact pads to a selected one of said bond pads on said common row of bond pads providing electrical connection therebetween; a third plurality of wirebonds, each one of said third plurality of wirebonds extending between a selected one of said signal contact pads on said third array of signal contact pads to a selected one of said bond pads on said common row of bond pads providing electrical connection therebetween, wherein at least one of said bond pads on said common row of bond pads is commonly shared by at least two wirebonds from said first, second and third pluralities of wirebonds whereby electrical communication is enabled between at least two of said first, second and third integrated circuit chips via said shared bond pads; at least one additional circuit component extending between and electrically connected to two of said bond pads on said first and second pluralities of bond pads; and a housing for hermetically sealing said electronic circuitry therein. ### Claim 16 An implantable cardiac stimulation device, comprising: electronic circuitry for generating cardiac stimulation pulses in at least one of the absence or presence of certain cardiac events, said electronic circuitry comprising: a substrate having adjacent first and second predefined die-attach areas located on a surface of said substrate, said substrate having a row of bond pads located on the substrate and positioned between said first and second die-attach pads; a first integrated circuit chip having a first array of signal contact pads disposed thereon, said first integrated circuit chip being mounted on said first predefined die-attach area on said surface of said substrate; a first plurality of wirebonds, each one of said first plurality of wirebonds extending between a selected one of said signal contact pads on said first array of signal contact pads to a selected one of said bond pads on said row of bond pads providing electrical connection therebetween; a second integrated circuit chip having a second array of signal contact pads disposed thereon, said second integrated circuit chip being vertically stacked upon said first integrated circuit chip; a second plurality of wirebonds, each one of said second plurality of wirebonds extending between a selected one of said signal contact pads on said second array of signal contact pads to a selected one of said bond pads on said row of bond pads providing electrical connection therebetween, wherein at least one of said bond pads is commonly shared by one of said first plurality of wirebonds and at least one of said second plurality of wirebonds whereby electrical communication is enabled between said first and second integrated circuit chips via said shared bond pads; a third integrated circuit chip having a third array of signal contact pads disposed thereon, said third integrated circuit chip being mounted on said second predefined die-attach area on said surface of said substrate; a third plurality of wirebonds, each one of said third plurality of wirebonds extending between a selected one of said signal contact pads on said third array of signal contact pads to a selected one of said bond pads on said row of bond pads providing electrical communication therebetween; a fourth plurality of wirebonds, each one of said third plurality of wirebonds extending between a selected one of said signal contact pads on one of said first or second arrays of signal contact pads to a selected one of said bond pads on said row of bond pads providing electrical communication therebetween and enabling electrical communication to between said third integrated circuit chip and at least one of said first and second integrated circuit chips; at least one additional circuit component extending between and electrically connected between two of said first or second bond pads located on said substrate; and a housing for hermetically sealing said electronic circuitry therein. ### Claim 17 An implantable cardiac stimulation device, comprising: electronic circuitry for generating cardiac stimulation pulses in at least one of the absence or presence of certain cardiac events, said electronic circuitry comprising: a first integrated circuit chip having a first array of signal contact pads disposed thereon; a second integrated circuit chip having a second array of signal contact pads disposed thereon; a substrate having adjacent first and second predefined die-attach areas located on a surface of said substrate, said substrate also having a first plurality of bond pads located thereon adjacent said first predefined die-attach area and a second plurality of bond pads located thereon adjacent said second predefined die-attach area, said first and second pluralities of bond pads together comprising a single row of bond pads located between said first and second predefined die-attach areas and common to said first and second pluralities of bond pads, said first integrated circuit chip being mounted on said first predefined die-attach area on said surface of said substrate, and said second integrated circuit chip being mounted on said second predefined die-attach area on said surface of said substrate; a first plurality of wirebonds, each one of said first plurality of wirebonds extending between a selected one of said first arrays of signal contact pads to a selected one of said first plurality of bond pads providing electrical communication therebetween; a second plurality of wirebonds, each one of said second plurality of wirebonds extending between a selected one of said signal contact pads on said second array of signal contact pads to a selected one of said second plurality of bond pads providing electrical communication therebetween, wherein at least one of said bond pads is common to said first and second pluralities of bond pads and is commonly shared by one of said first plurality of wirebonds and at least one of said second plurality of wirebonds whereby electrical communication is enabled between said first and said integrated circuit chips via said shared bond pads; at least one additional circuit component extending between and electrically connected to two of said bond pads on said first and second plurality of bond pads; and a housing for hermetically sealing said electronic circuitry therein. ### Claim 18 An implantable cardiac stimulation device, comprising: electronic circuitry for generating cardiac stimulation pulses in at least one of the absence or presence of certain cardiac events, said electronic circuitry comprising: a first integrated circuit chip having a first array of signal contact pads disposed thereon; a second integrated circuit chip having a second array of signal contact pads disposed thereon; a substrate having a first predefined die-attach area located on a surface of said substrate, said first integrated circuit chip being mounted on said first predefined die-attach area on said surface, said substrate also having a plurality of bond pads located thereon adjacent said first predefined die-attach area, said second integrated circuit chip being vertically stacked upon said first integrated circuit chip; a first plurality of wirebonds, each one of said first plurality of wirebonds extending between a selected one of said signal contact pads on said first array of signal contact pads to a selected one of said bond pads on said first plurality of bond pads providing electrical communication therebetween; second plurality of wirebonds, each one of said second plurality of wirebonds extending between a selected one of said signal contact pads on said second array of signal contact pads to a selected one of said bond pads providing electrical communication therebetween, wherein at least one of said bond pads is commonly shared by one of said first plurality of wirebonds and at least one of said second plurality of wirebonds whereby electrical communication is enabled between said first and second integrated circuit chips via said shared bond pads; and at least one additional circuit component extending between and electrically connected to two of said bond pads.