Reduction of dislocations in a heteroepitaxial semiconductor structure
AssigneeSpire Corporation
InventorsNasser H. Karam, Steven J. Wojtczuk
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Abstract
A heteroepitaxial semiconductor device having reduced density of threading dislocations and a process for forming such a device. According to one embodiment, the device includes a substrate which is heat treated to a temperature in excess of 1000.degree. C., a film of arsenic formed on the substrate at a temperature between 800.degree. C. and 840.degree. C., a GaAs nucleation layer of less than 200 angstroms and formed at a temperature between about 350.degree. C. and 450.degree. C., and a plurality of stacked groups of layers of InP, wherein adjacent InP layers are formed at different temperatures.
Claims36
A heteroepitaxial semiconductor device comprising:
- a substrate formed from a first semiconductor material;
- a plurality of stacked groups of layers of a second semiconductor material formed on said substrate, wherein adjacent layers within each group of layers are formed at different temperature ranges to induce mechanical stresses and, thereby, reduce dislocations.
Dependencies are inferred from the claim text.