CMOS output buffer with CMOS-controlled lateral SCR devices

Abstract

An MOS-controlled, lateral SCR device including a semiconductor substrate of a first doping type; a first well region formed in the substrate and being of a second doping type which is different from the first doping type; a second well region formed in the substrate, being of the second doping type, and being spaced apart from the first well region so as to define an intermediate region separating the first and second well regions from each other; a first region formed within the first well region and extending into the intermediate region between the first and second well regions, the first region being of the second doping type; a second region formed within the second well region and extending into the intermediate region between the first and second well regions, the second region being of the second doping type; and a control gate bridging over the intermediate region between the first and second regions.

Dependencies are inferred from the claim text.