Methods and circuits for single-memory dynamic cell multivalue data storage

A random access memory comprising:

• an array of rows and columns of memory cells;
• plurality of bitlines, each associated with a one of said plurality of columns,
• wherein each of said memory cells comprises:
• first circuitry operable for sensing a most significant bit (MSB) of a stored data value, said first circuitry coupled to a corresponding one of said plurality of bitlines;
• second circuitry operable for sensing a least significant bit (LSB) of a stored data value, said first circuitry coupled to said corresponding one of said plurality of bitlines, wherein said MSB and said LSB are output on said corresponding bitline;
• a data storage element operable for coupling to said corresponding bitline;
• and
• a write/restore unit coupled to said plurality of bitlines, said write/restore unit including a programmable voltage supply operable for receiving a multibit binary data value and, in response thereto, outputting a multilevel stored data value for storage in said data storage element.

A method of storing a plurality of data bits in a random access memory cell comprising:

• for a write to said memory cell:
• providing said plurality of data bits to a programmable voltage supply, said programmable voltage supply outputting a preselected voltage representing said plurality of data bits;
• storing said preselected voltage in a storage element in said cell;
• for a read operation:
• sensing a most significant bit (MSB) of said data bits in response to said preselected voltage in said storage element;
• sensing a least significant bit (LSB) of said data bits in response to said preselected voltage in said storage element and said MSB;
• following a read operation, restoring said preselected voltage in said storage element, said step of restoring comprising:
• providing said MSB and said LSB to said programmable voltage source;
• and
• outputting said preselected voltage in response to said MSB and said LSB.