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US 6,001,701 AGranted
Process for making bipolar having graded or modulated collector
AssigneeLucent Technologies Inc.
InventorsMichael Scott Carroll, Samir Chaudhry, Alan Sangone Chen, Yih-Feng Chyan, Kuo-Hua Lee, William John Nagy
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Abstract
A bipolar fabrication process, illustratively suited for integration into a conventional CMOS process to thereby form a BiCMOS integrated circuits is disclosed. The collector and base are formed through multiple implants and a single masking step to thereby provide a continuous low resistance collector region.
Claims7
A method of forming a transistor comprising:
- (a) forming an isolation region extending into a substrate;
- said isolation region defining first and second portions of said substrate surface;
- (b) subjecting said substrate to more than one first type ion implantation steps to thereby create a region which will later become a collector that extends under said isolation region to said first and second portions of said substrate;
- (c) subjecting said substrate to a second type ion implantation to thereby create a region below second portion of said substrate surface which will later become a base;
- and
- (d) subjecting the substrate to first type ion implantation through said second portion of said substrate surface to create a region which will later become an emitter.
3 more elements
A method of forming a transistor comprising:
- (a) forming an isolation region extending into a substrate;
- said isolation region defining first and second portions of said substrate surface;
- (b) subjecting said substrate to one or more first type ion implantation steps to thereby create a region which will later become a collector;
- (c) subjecting said substrate to a second type ion implantation to thereby create a region below second portion of said substrate surface which will later become a base;
- (d) forming a blanket dielectric over said first and second portions of said substrate;
- (e) anisotropically etching said dielectric layer to remove a portion of said dielectric layer;
- (f) forming a patterned material masking layer over said dielectric layer;
- (g) isotropically etching said dielectric layer to expose a portion of said second portion of said substrate surface;
- and
- (h) subjecting the substrate to type ion implantation through said second portion of said substrate surface to create a region which will later become an emitter;
- said steps (d)-(g) being performed prior to step (h).
8 more elements
Dependencies are inferred from the claim text.