Method and apparatus for optimizing digital processing

A method for a controlling operation to control execution of a plurality of processing operations, the method comprising the steps of:

• a) receiving an indication of an execution request from one of the plurality of processing operations while the one of the plurality of processing operations is in a disabled mode;
• b) determining whether current execution of the one of the plurality of processing operations would produce an error;
• c) when current execution of the one of the plurality of processing operations would produce an error, determining whether the one of the plurality of processing operations could be altered to eliminate the error;
• and
• d) when the one of the plurality of processing operations can be altered to eliminate the error, altering the one of the plurality of processing operations to produce an altered one of the plurality of processing operations.

A method for executing a plurality of processing operations, the method comprising the steps of:

• a) while in a disabled mode, receiving, by one of the plurality of processing operations, an execution request;
• b) providing, by the one of the plurality of processing operations, the execution request to a controlling processing operation;
• c) determining, by the controlling processing operation, whether the plurality of processing operations can perform the execution request without error;
• and
• d) when the plurality of operations can perform the execution request without error, enabling, by the controlling processing operation, execution of the plurality of processing operations based on the execution request.

A processing circuit comprising:

• a processing unit;
• and
• memory operably coupled to the processing unit, wherein the memory stores programming instructions that, when read by the processing unit, causes the processing unit to (a) receive a user request for at least one digital processing operation;
• (b) determine whether the at least one digital processing operation is of a first type;
• (c) provide the at least one digital processing operation to an operational object when the at least one digital processing operation is of the first type;
• (d)determine whether the at least one digital processing operation is executable without alteration;
• and (e) alter the at least one digital processing operation to produce at least one altered digital processing operation when the at least one digital processing operation is not executable without alteration.

A processing circuit comprising:

• a processing unit;
• and
• memory operably coupled to the processing unit, wherein the memory stores programming instructions that, when read by the processing unit, causes the processing unit to (a) receive an indication of an execution request from one of the plurality of processing operations while the one of the plurality of processing operations is in a disabled mode;
• (b) determine whether current execution of the one of the plurality of processing operations would produce an error;
• (c) determine whether the one of the plurality of processing operations could be altered to eliminate the error when current execution of the one of the plurality of processing operations would produce an error;
• and (d) alter the one of the plurality of processing operations to produce an altered one of the plurality of processing operations when the one of the plurality of processing operations can be altered to eliminate the error.

A processing circuit comprising:

• a processing unit;
• and
• memory operably coupled to the processing unit, wherein the memory stores programming instructions that, when read by the processing unit, causes the processing unit to (a) receive, from one of plurality of processing operations, an execution request to a controlling processing operation, wherein the one of the plurality of processing operations is in a disabled mode;
• (b) determine whether the plurality of processing operations can perform the execution request without error;
• and (c), enable execution of the plurality of processing operations based on the execution request when the plurality of operations can perform the execution request without error.