Concurrent generation of ECC error syndromes and CRC validation syndromes in a DVD storage device
AssigneeCirrus Logic, Inc.
InventorChristopher P. Zook
Life of this patent
Estimating the term…
Loading patent…
AssigneeCirrus Logic, Inc.
InventorChristopher P. Zook
Estimating the term…
A compact disk (CD) and digital video disk (DVD) error correction system is disclosed which generates a CRC validation syndrome on-the-fly while correcting the CD/DVD product code, thereby reducing the overall access latency as compared to the prior art. For the DVD product code, which comprises multiple data sectors with separate CRC symbols appended to each data sector, a buffer used for C1 and C2 encoding/decoding in CD mode is used to store partial data and error CRC syndromes for each data sector. During the vertical (P) and horizontal (Q) passes over the DVD product code, data and error CRC syndrome registers are loaded with the appropriate partial CRC syndromes depending on the current data symbol being processed by a P/Q decoder. After processing each data sector, the data and error CRC syndromes for each data sector are combined and compared to a constant to determine whether the corrections to the data sector are valid and complete. The data and error CRC syndromes are adjusted during the P and Q passes to account for offsets in the CRC codeword symbols. For example, when processing a vertical (i.e., P) codeword, it is necessary to adjust the error CRC syndromes by one row of data symbols for each vertical symbol processed. This is carried out by using a special multiplier circuit which multiplies the data and error CRC syndromes by x.sup.k MODG(x) where k is the offset (e.g., one row of symbols) and G(x) is the CRC generator polynomial.
An error correction processor for correcting errors in binary data read from a disk storage medium, wherein the binary data comprises a plurality of intersecting ECC codewords of a multi-dimensional codeword, the multi-dimensional codeword comprising ECC redundancy symbols, validation redundancy symbols, and a plurality of data sectors, the error correction processor comprising:
An error correction processor for correcting errors in binary data read from a disk storage medium, wherein the binary data comprises a plurality of intersecting ECC codewords of a multi-dimensional codeword, the multi-dimensional codeword comprising ECC redundancy symbols, validation redundancy symbols, and a plurality of data sectors, the error correction processor comprising:
A method for correcting errors in binary data read from a disk storage medium, wherein the binary data comprises a plurality of intersecting ECC codewords of a multi-dimensional codeword, the multi-dimensional codeword comprising ECC redundancy symbols, validation redundancy symbols, and a plurality of data sectors, the method comprising the steps of:
Dependencies are inferred from the claim text.