Asynchronous transfer mode (ATM) segmentation and reassembly unit virtual address translation unit architecture
AssigneeSun Microsystems, Inc.
InventorJohn E. Watkins
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Abstract
An apparatus and method for translating a virtual address to a physical address utilizing an address translation unit implemented within a network interface card is described. The address translation unit of the present invention is utilized in a computer system. The computer system comprises a first bus; processors with embedded caches and memory coupled to the first bus; a second bus; a network logic coupled to the second bus, wherein the network logic includes an address translation unit; and a bus bridge coupled to the first bus and to the second bus.
Claims8
A computer system comprising:
- a) a first bus;
- b) a memory coupled to said first bus;
- c) a second bus;
- d) at least one I/O device coupled to said second bus;
- and
- e) a network logic coupled to said I/O device, wherein said network includes an address translation unit (ATU) configured to translate a virtual address(VA) to a physical address(PA) and passing said VA to a bus bridge, coupled to said first bus and said second bus, if said ATU cannot translate said VA;
- wherein said bus bridge includes an I/O MMU(Input/Output Memory Management Unit), wherein said I/O MMU is configured to translate said VA received from said ATU to its corresponding PA or bypassing said PA received from said ATU.
A computer system, comprising:
- a) a main memory;
- b) at least one CPU(central processing unit);
- c) a system bus coupled to said main memory and said CPU;
- d) a bridge including an I/O MMU(Input/Output Memory Management Unit), wherein said bridge is coupled to said system bus;
- e) at least one I/O device;
- f) an I/O bus coupled to said bridge and said I/O device;
- and
- g) a network logic coupled to said I/O device, wherein said network logic includes an ATU(address translation unit) that is configured to translate a VA(virtual address) into a PA(physical address) and passing said VA to said bridge if said ATU cannot translate said VA;
- wherein said I/O MMU of said bus bridge is configured to translate VA received from said ATU to its corresponding PA or bypassing said PA received from said ATU.
A method of translating a virtual address to a physical address in a computer system that includes a first bus and a main memory coupled to said first bus, a second bus, at least one I/O device coupled to the second bus, a network logic coupled to said I/O device, wherein said network logic includes an address translation unit ("ATU") and a bus bridge coupled to said first bus and to said second bus, said method comprising the following steps:
- a) providing a virtual address which is to be translated to said address translation unit;
- b) outputting from said ATU (i) a translated physical address affiliated with said virtual address or (ii) said virtual address untranslated;
- c) providing said output to said bus bridge, wherein said bus bridge includes an I/O MMU(Input/Output Memory Management Unit) that is configured to translate said virtual address to said physical address or bypassing the translation of said virtual address to said physical address;
- d) providing said physical address to said main memory.
Dependencies are inferred from the claim text.