Vertical polysilicon diode compatible with CMOS/BiCMOS integrated circuit processes

A junction diode structure formed within an integrated circuit comprising:

• a semiconductor substrate;
• a dielectric layer formed over the semiconductor substrate;
• a first polysilicon layer formed upon the dielectric layer, the first polysilicon layer having a first dopant polarity and a first dopant concentration;
• a second polysilicon layer formed at least in part overlapping and at least in part in contact with the first polysilicon layer, the second polysilicon layer having a second dopant polarity and a second dopant concentration, the second dopant polarity being opposite to the first dopant polarity, where a first portion of the second polysilicon layer overlapping and in contact within a first portion of the first polysilicon layer comprises a junction diode;
• and
• a second dielectric layer separating a second portion of the first polysilicon from a second portion of the second polysilicon layer, where the second portion of the first polysilicon layer is contiguous with the first portion of the first polysilicon layer and the second portion of the second polysilicon layer is contiguous with the first portion of the second polysilicon layer, thus forming a polysilicon capacitor contiguous with and in parallel with the junction diode, where the junction diode is electrically isolated from the semiconductor substrate.