US 5,974,521 A · Apparatus and method for signal processing

Abstract

An associative signal processing apparatus for processing a plurality of samples of an incoming signal in parallel, the apparatus comprising: (a) an array of processors, each processor including a multiplicity of associative memory cells, the memory cells being operative to perform: (i) compare operations, in parallel, on the plurality of samples of the incoming signal; and (ii) write operations, in parallel, on the plurality of samples of the incoming signal; and (b) an I/O buffer register including a multiplicity of associative memory cells, the register being operative to: (i) input the plurality of samples of the incoming signal to the array of processors in parallel by having the I/O buffer register memory cells perform at least one associative compare operation and the array memory cells perform at least one associative write operation; and (ii) receive, in parallel, a plurality of processed samples from the array of processors by having the array memory cells perform at least one associative compare operation and the I/O buffer register memory cells perform at least one write operation.

Claims18

Dependent claims

An associative signal processing apparatus for processing a plurality of samples of an incoming signal in parallel, the apparatus comprising:

(a) an array of processors, each processor including a multiplicity of associative memory cells, said memory cells being operative to perform:
(i) compare operations, in parallel, on the plurality of samples of the incoming signal;
and
(ii) write operations, in parallel, on the plurality of samples of the incoming signal;
and
(b) an I/O buffer register including a multiplicity of associative memory cells, said register being operative to:
(i) input the plurality of samples of the incoming signal to said array of processors in parallel by having said I/O buffer register memory cells perform at least one associative compare operation and said array memory cells perform at least one associative write operation;
and
(ii) receive, in parallel, a plurality of processed samples from said array of processors by having said array memory cells perform at least one associative compare operation and said I/O buffer register memory cells perform at least one write operation.

6 more elements

A method for processing a distorted image, the distorted image including a plurality of pixels, the method comprising the steps of:

(a) providing an array of processors, each processor including a multiplicity of associative memory cells, said memory cells being operative to perform:
(i) compare operations, in parallel, on at least a portion of the plurality of pixels;
and
(ii) write operations, in parallel, on at least a portion of the plurality of pixels;
(b) providing a register array including at least one register operative to:
(i) store responders arriving from said associative memory cells in a plurality of said processors;
and
(ii) provide communication, within a single cycle, between a plurality of pairs of non-adjacent processors in said array of processors;
(c) providing each of the plurality of pixels to at least one of said processors;
and
(d) transforming at least a portion of the plurality of pixels in parallel to compensate for a distortion of the distorted image, by arranging, in parallel, in a plurality of said processors, at least two of the pixels in a single processor via said register array, and by performing in parallel, compare and write operations on a plurality of said pairs of pixels.

8 more elements

Dependencies are inferred from the claim text.

Apparatus and method for signal processing

Life of this patent

Apparatus and method for signal processing

Life of this patent

Abstract

Claims18