Interposer with embedded circuitry and method for using the same to package microelectronic units

A chip carrier for assembly intermediate an integrated circuit having a footprint and a circuit panel, comprising:

• an upper thin film insulation layer having a footprint which is approximately equal to the integrated circuit footprint;
• a plurality of upper contact pads arranged in a desired pattern, and disposed at least in part within said upper insulation layer;
• a bottom thin film insulation layer having a footprint which is approximately equal to the integrated circuit footprint;
• a plurality of lower contact pads arranged in a desired pattern, and disposed at least in part within the bottom insulation layer;
• a plurality of thin film micro-devices formed between said upper insulation layer and said bottom insulation layer;
• at least some of said plurality of upper contact pads and lower contact pads being selectively electrically interconnected via said micro-devices, such that the chip carrier has an overall footprint which is substantially equal to the footprint of the integrated circuit;
• a plurality of electrically conductive terminals extending outwardly from said lower contact pads, and establishing electrical connection and a mechanical spring action between the integrated circuit and the chip carrier for absorbing excess contraction or expansion;
• and
• wherein one of said micro-devices is an inductor comprised of a first yoke, a first insulation layer deposited on said first yoke, and a first inductive coil layer formed within said first insulation layer.

A chip carrier for assembly intermediate an integrated circuit having a footprint and a circuit panel, comprising:

• an upper thin film insulation layer having a footprint which is approximately equal to the integrated circuit footprint;
• a plurality of upper contact pads arranged in a desired pattern, and disposed at least in part within said upper insulation layer;
• a bottom thin film insulation layer having a footprint which is approximately equal to the integrated circuit footprint;
• a plurality of lower contact pads arranged in a desired pattern, and disposed at least in part within the bottom insulation layer;
• a plurality of thin film micro-devices formed between said upper insulation layer and said bottom insulation layer, such that the chip carrier has an overall footprint which is substantially equal to the footprint of the integrated circuit;
• at least some of said plurality of upper contact pads and lower contact pads being selectively electrically interconnected via said micro-devices;
• and
• a plurality of electrically conductive terminals extending outwardly from said upper contact pads, and establishing electrical connection and a mechanical spring action between the circuit panel and the chip carrier for absorbing excess contraction or expansion;
• and
• wherein one of said micro-devices is an inductor comprised of a first yoke, a first insulation layer deposited on said first yoke, and a first inductive coil layer formed within said first insulation layer.