Performance monitoring in a data processing system
AssigneeInternational Business Machines Corporation
InventorsFrank Eliot Levine, Charles Philip Roth, Edward Hugh Welbon, Jack Chris Randolph
Life of this patent
Estimating the term…
Abstract
Performance monitoring capabilities are expanded to an entire data processing system so that performance analyses can be made for operations occurring within the entire data processing system and not merely within the processor or any other device containing the performance monitor. Therefore, there is a provision for communicating performance monitor-related signals between the various performance monitors within the various devices and processor within a data processing system.
Claims19
A data processing system comprising:
- a first processor, wherein the first processor includes a first performance monitor;
- a first device coupled to the first processor, wherein the first device includes a second performance monitor;
- and
- circuitry for communicating between the first and second performance monitors,
- wherein the first and second performance monitors are each programmable for receiving and counting selected signals within the processor and device, wherein the first performance monitor is operable for triggering operation of the second performance monitor.
A data processing system comprising:
- a first processor, wherein the first processor includes a first performance monitor;
- a first device coupled to the first processor, wherein the first device includes a second performance monitor;
- and
- circuitry for communicating between the first and second performance monitors,
- wherein the first and second performance monitors are each programmable for receiving and counting selected signals within the processor and device, wherein the second performance monitor is operable for sending an interrupt to the processor.
A data processing system comprising:
- a first processor, wherein the first processor includes a first performance monitor;
- a first device coupled to the first processor, wherein the first device includes a second performance monitor;
- and
- circuitry for communicating between the first and second performance monitors,
- wherein the first and second performance monitors are each programmable for receiving and counting selected signals within the processor and device, wherein the second performance monitor is operable for triggering an operation of the first performance monitor.
In a data processing system, wherein the data processing system includes (1) a first processor, wherein the first processor includes a first performance monitor, and (2) a first device coupled to the first processor, wherein the first device includes a second performance monitor, wherein the first and second performance monitors are each programmable for receiving and counting selected signals within the processor and device, a method for performing performance monitoring of selected operations, comprising the steps of:
- programming the first and second performance monitors via software-accessible registers;
- performing, by the first and second performance monitors, one or more counting functions;
- and
- communicating results of the one or more counting functions between the first and second performance monitors, wherein the communicating step further includes the step of triggering, by the first performance monitor, operation of the second performance monitor.
A data processing system comprising:
- a first processor, wherein the first processor includes a first performance monitor;
- a second processor coupled to the first processor, wherein the second processor includes a second performance monitor;
- and
- circuitry for communicating between the first and second performance monitors,
- wherein the first and second performance monitors are each programmable for receiving and counting selected signals within the first and second processors, respectfully, wherein the first performance monitor is operable for triggering operation of the second performance monitor.
A data processing system comprising:
- a first processor, wherein the first processor includes a first performance monitor;
- a second processor coupled to the first processor, wherein the second processor includes a second performance monitor;
- and
- circuitry for communicating between the first and second performance monitors,
- wherein the first and second performance monitors are each programmable for receiving and counting selected signals within the first and second processors, respectfully, wherein the second performance monitor is operable for sending an interrupt to the first processor.
Dependencies are inferred from the claim text.