Method for forming contacts and vias with improved barrier metal step-coverage

A method for forming metal contacts to active areas of integrated circuit devices formed within the surface of a semiconductor wafer comprising:

• providing a semiconductor wafer having integrated circuit semiconductor devices formed within its surface and having an insulative layer over said semiconductor devices with vertical walled openings patterned and etched in said insulative layer, exposing subjacent contact regions of said semiconductor devices;
• depositing a refractory metal over said insulative layer;
• depositing a barrier material over said refractory metal by a PVD technique whereby cusps of are formed at the mouths of said vertical walled openings;
• depositing a spin-on-glass (SOG) over said semiconductor wafer, whereby said SOG fills said vertical walled openings to above a lower portion of said cusps;
• partially curing said SOG;
• subjecting said semiconductor wafer to chemical-mechanical-polishing, until said SOG has been penetrated and said cusps are removed;
• removing said SOG;
• depositing a glue layer on said semiconductor wafer;
• depositing a metal layer over said glue layer;
• and
• etching said metal layer with a unidirectional dry etching technique to form metal plugs.

A method for forming vias between levels of wiring metallization of integrated circuit devices formed in a semiconductor wafer comprising:

• providing a semiconductor wafer having integrated circuit semiconductor devices formed within its surface and having at least one level of wiring metallization connected to said semiconductor devices;
• depositing an insulative layer over said wiring metallization;
• depositing a photoresist layer over said insulative layer;
• patterning said photoresist layer to define vias;
• etching said vias using reactive-ion-etching to produce vertical walled openings exposing subjacent wiring metallization;
• removing said photoresist layer;
• depositing a refractory metal over said insulative layer;
• depositing a barrier material over said refractory metal by a PVD technique whereby cusps of are formed at the mouths of said vertical walled openings;
• depositing a spin-on-glass (SOG) on said semiconductor wafer, whereby said SOG glass fills said vertical walled openings to above the lower portion of said cusps;
• partially curing said SOG;
• subjecting said semiconductor wafer to chemical-mechanical-polishing, until said SOG has been penetrated and said cusps are removed;
• removing said SOG;
• depositing a glue layer on said semiconductor wafer;
• depositing a metal layer over said glue layer;
• and
• etching said metal layer with a unidirectional dry etching technique to form metal plugs.