Manufacturing capping layer for the fabrication of cobalt salicide structures
AssigneeAdvanced Micro Devices, Inc.
InventorsPaul R. Besser, Robin W. Cheung, Robert Chen
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AssigneeAdvanced Micro Devices, Inc.
InventorsPaul R. Besser, Robin W. Cheung, Robert Chen
Estimating the term…
An improved process for manufacturing cobalt silicide layers uses two capping layers. A first capping layer of titanium nitride prevents the formation of a cobalt/titanium intermetallic. A subsequently formed titanium metallic layer getters impurities from outgassing and the ambient preventing corruption of the cobalt layer. Two rapid thermal annealing steps convert the cobalt at the cobalt/silicon intermetallic into highly conductive cobalt disilicide. The cobalt silicide does not suffer from linewidth dependent increases in resistivity. Therefore, the cobalt disilicide formed by the present method is useful for semiconductor devices with linewidths and feature sizes less than 0.20 .mu.m. The process has wide applicability and may be used to fabricate local circuit interconnects, floating gates, double polysilicon stacked floating gates as well as other uses.
A process for forming a cobalt disilicide layer on a silicon substrate comprising the steps of:
A process for forming a cobalt disilicide layer on exposed silicon regions of a silicon substrate comprising the steps of:
A method for forming a polycrystalline cobalt disilicide structure on a metal oxide transistor in a silicon substrate, comprising the steps of:
A process for forming cobalt disilicide contacts on a semiconductor device comprising the steps of:
A process for forming fill structures leading to cobalt disilicide contacts, comprising the steps of:
Dependencies are inferred from the claim text.