Method for making semiconductor device incorporating an electrical contact to an internal conductive layer

A method of fabricating a storage container structure comprising the steps of:

• providing a substrate including a semiconductor structure;
• forming a patterning stop region;
• forming an insulating overlayer over a first surface of said substrate and over said patterning stop region, such that said insulating overlayer comprises a lower overlayer surface in contact with said substrate and said patterning stop region, an upper overlayer surface, and an intermediate overlayer portion defined between said lower overlayer surface and said upper overlayer surface;
• patterning a container region within said insulating overlayer by removing a portion of said upper overlayer surface, a portion of said intermediate overlayer portion, and a portion of said lower overlayer surface such that
• said container region defines a container cross section having container side walls, a container bottom wall, an upper container boundary, and a container interior bounded by said upper container boundary, said container side walls, and said container bottom wall,
• said upper container boundary is defined by said removed portion of said upper overlayer surface,
• said container side walls are defined by said insulating overlayer, and
• said container bottom wall is at least partially defined by a surface of said patterning stop region;
• layering a first conductive film over an interior surface of said container region;
• layering an intermediate insulating film over said first conductive film;
• layering a second conductive film over said intermediate insulating film such that said second conductive film includes a first film portion characterized by a first film thickness and a second film portion characterized by a second film thickness, such that said second film thickness is greater than said first film thickness, and such that said second film portion occupies at least a portion of said container interior;
• patterning a contact region in said second film portion of said second conductive film such that said contact region extends into said container region;
• and
• forming an electrical contact in said contact region such that respective portions of said electrical contact, said second conductive film, said intermediate insulating film, and said first conductive film occupy collectively at least a portion of said container region.

A method of fabricating a storage container structure comprising the steps of:

• providing a substrate including a semiconductor structure;
• forming a patterning stop region such that said patterning stop region includes a central stop region, a first lateral stop region, and a second lateral stop region;
• forming an insulating overlayer over a first surface of said substrate and over said patterning stop region;
• patterning a container region within said insulating overlayer such that said container region defines a container cross section having a container bottom wall, a first side wall including a first upper side wall portion and a first lower side wall portion, and a second side wall including a second upper side wall portion and a second lower side wall portion, and such that
• said first upper side wall portion and said second upper side wall portion define an upper container portion therebetween,
• said first lower side wall portion and said second lower side wall portion define a lower container portion therebetween,
• said upper container portion is wider than said lower container portion,
• said container bottom wall is defined by said central stop region,
• said first lower side wall portion is defined by a lateral surface of said first lateral stop region, and
• said second lower side wall portion is defined by an opposite lateral surface of said second lateral stop region;
• layering a first conductive film over an interior surface of said container region;
• layering an intermediate insulating film over said first conductive film;
• layering a second conductive film over said intermediate insulating film such that said second conductive film occupies at least a portion of an upper side wall region positioned between said first and second upper side wall portions;
• patterning a contact region in said second conductive film;
• and
• forming an electrical contact in said contact region such that respective portions of said electrical contact, said second conductive film, said intermediate insulating film, and said first conductive film occupy collectively at least a portion of said container region.

A method of fabricating a storage container structure comprising the steps of:

• providing a substrate including a semiconductor structure;
• forming a central patterning stop region;
• forming a pair of lateral patterning stop regions over a first surface of said substrate such that said lateral patterning stop regions form a substrate topography, said substrate topography including a central void positioned between said lateral patterning stop regions and over said central patterning stop region;
• forming an insulating overlayer over said first surface of said substrate and over said central and lateral patterning stop regions;
• patterning a container region within said insulating overlayer such that said container region defines a container cross section having an upper container portion and a lower container portion, such that said lower container portion is positioned within said central void, and such that said upper container portion is wider than said lower container portion;
• layering a first conductive film over an interior surface of said container region;
• layering an intermediate insulating film over an interior surface of said container region to define a back fill region such that said back fill region is bounded in part by an interior surface of said intermediate insulating film and such that said back fill region is positioned within said upper container portion;
• layering a second conductive film over said intermediate insulating film such that said second conductive film occupies at least a portion of said back fill region;
• patterning a contact region in said second conductive film such that said contact region occupies at least a portion of said upper container portion;
• and
• forming an electrical contact in said contact region such that respective portions of said electrical contact, said second conductive film, said intermediate insulating film, and said first conductive film occupy collectively at least a portion of said container region.

A method of fabricating a storage container structure comprising the steps of:

• providing a silicon semiconductor substrate;
• forming a central patterning stop region within said substrate such that said central patterning stop region comprises a diffusion layer within said substrate;
• forming a first lateral patterning stop region over said substrate such that said first lateral patterning stop region comprises a nitride formed over a first portion of doped polysilicon;
• forming a second lateral patterning stop region over said substrate such that said second lateral patterning stop region comprises a nitride formed over a second portion of doped polysilicon, such that a central void is defined between said first lateral patterning stop region and said second lateral patterning stop region, and such that said central void is positioned over said central patterning stop region;
• forming an insulating glass overlayer over a first surface of said substrate and over said patterning stop region;
• selectively etching a container region within said insulating glass overlayer such that said container region defines a container cross section having a container bottom wall, a first side wall including a first upper side wall portion and a first lower side wall portion, and a second side wall including a second upper side wall portion and a second lower side wall portion, and such that
• said first upper side wall portion and said second upper side wall portion define an upper container portion therebetween,
• said first lower side wall portion and said second lower side wall portion define a lower container portion therebetween,
• said upper container portion is wider than said lower container portion,
• said container bottom wall is defined by said central patterning stop region,
• said first lower side wall portion is defined by a lateral surface of said first lateral patterning stop region, and
• said second lower side wall portion is defined by an opposite lateral surface of said second lateral patterning stop region;
• layering a first conductive polysilicon film over an interior surface of said container region;
• layering a dielectric hemispherical grain polysilicon film over said first conductive polysilicon film;
• layering a second conductive polysilicon film over said dielectric film such that said second conductive film occupies a lower side wall region positioned between said first and second lower side wall portions and at least a portion of an upper side wall region positioned between said first and second upper side wall portions;
• patterning a contact region in said second conductive film such that said contact region occupies at least a portion of said upper side wall region;
• and
• forming an electrical contact in said contact region such that said electrical contact extends along a substantially linear path from said lower side wall region through said upper side wall region to an exposed contact position above said container region, and such that respective portions of said electrical contact, said second conductive film, said dielectric hemispherical grain polysilicon film, and said first conductive film occupy collectively at least a portion of said container region.

A method of fabricating a memory device comprising the steps of:

• forming a storage container structure by
• providing a substrate including a semiconductor structure;
• forming a patterning stop region;
• forming an insulating overlayer over a first surface of said substrate and over said patterning stop region, such that said insulating overlayer comprises a lower overlayer surface in contact with said substrate and said patterning stop region, an upper overlayer surface, and an intermediate overlayer portion defined between said lower overlayer surface and said upper overlayer surface;
• patterning a container region within said insulating overlayer by removing a portion of said upper overlayer surface, a portion of said intermediate overlayer portion, and a portion of said lower overlayer surface such that
• said container region defines a container cross section having container side walls, a container bottom wall, an upper container boundary, and a container interior bounded by said upper container boundary, said container side walls, and said container bottom wall,
• said upper container boundary is defined by said removed portion of said upper overlayer surface,
• said container side walls are defined by said insulating overlayer, and
• said container bottom wall is at least partially defined by a surface of said patterning stop region;
• layering a first conductive film over an interior surface of said container region;
• layering an intermediate insulating film over said first conductive film;
• layering a second conductive film over said intermediate insulating film such that said second conductive film includes a first film portion characterized by a first film thickness and a second film portion characterized by a second film thickness, such that said second film thickness is greater than said first film thickness, and such that said second film portion occupies at least a portion of said container interior;
• patterning a contact region in said second film portion of said second conductive film such that said contact region extends into said container region;
• and
• forming an electrical contact in said contact region such that respective portions of said electrical contact, said second conductive film, said intermediate insulating film, and said first conductive film occupy collectively at least a portion of said container region;
• and
• coupling a bit line terminal to a charge storage lamina through a switching structure such that said charge storage lamina comprises said first conductive film, said intermediate insulating film, and said second conductive film, and such that a charge transfer status of said switching structure changes in response to a memory access command.

A method of fabricating a memory device comprising the steps of:

• forming a storage container structure by
• providing a substrate including a semiconductor structure;
• forming a central patterning stop region;
• forming a pair of lateral patterning stop regions over a first surface of said substrate such that said lateral patterning stop regions form a substrate topography, said substrate topography including a central void positioned between said lateral patterning stop regions and over said central patterning stop region;
• forming an insulating overlayer over said first surface of said substrate and over said central and lateral patterning stop regions;
• patterning a container region within said insulating overlayer such that said container region defines a container cross section having an upper container portion and a lower container portion, such that said lower container portion is positioned within said central void, and such that said upper container portion is wider than said lower container portion;
• layering a first conductive film over an interior surface of said container region;
• layering an intermediate insulating film over an interior surface of said container region to define a back fill region such that said back fill region is bounded in part by an interior surface of said intermediate insulating film and such that said back fill region is positioned within said upper container portion;
• layering a second conductive film over said intermediate insulating film such that said second conductive film occupies said back fill region;
• patterning a contact region in said second conductive film such that said contact region occupies at least a portion of said upper container portion;
• and
• forming an electrical contact in said contact region such that respective portions of said electrical contact, said second conductive film, said intermediate insulating film, and said first conductive film occupy collectively at least a portion of said container region;
• and
• coupling a bit line terminal to a charge storage lamina through a switching structure such that said charge storage lamina comprises said first conductive film, said intermediate insulating film, and said second conductive film, and such that a charge transfer status of said switching structure changes in response to a memory access command.

A method of fabricating a computer system comprising the steps of:

• forming a storage container structure by
• providing a substrate including a semiconductor structure;
• forming a patterning stop region;
• forming an insulating overlayer over a first surface of said substrate and over said patterning stop region, such that said insulating overlayer comprises a lower overlayer surface in contact with said substrate and said patterning stop region, an upper overlayer surface, and an intermediate overlayer portion defined between said lower overlayer surface and said upper overlayer surface;
• patterning a container region within said insulating overlayer by removing a portion of said upper overlayer surface, a portion of said intermediate overlayer portion, and a portion of said lower overlayer surface such that
• said container region defines a container cross section having container side walls, a container bottom wall, an upper container boundary, and a container interior bounded by said upper container boundary, said container side walls, and said container bottom wall,
• said upper container boundary is defined by said removed portion of said upper overlayer surface,
• said container side walls are defined by said insulating overlayer, and
• said container bottom wall is at least partially defined by a surface of said patterning stop region;
• layering a first conductive film over an interior surface of said container region;
• layering an intermediate insulating film over said first conductive film;
• layering a second conductive film over said intermediate insulating film such that said second conductive film includes a first film portion characterized by a first film thickness and a second film portion characterized by a second film thickness, such that said second film thickness is greater than said first film thickness, and such that said second film portion occupies at least a portion of said container interior;
• patterning a contact region in said second film portion of said second conductive film such that said contact region extends into said container region;
• and
• forming an electrical contact in said contact region such that respective portions of said electrical contact, said second conductive film, said intermediate insulating film, and said first conductive film occupy collectively at least a portion of said container region;
• coupling a bit line terminal to a charge storage lamina through a switching structure such that said charge storage lamina comprises said first conductive film, said intermediate insulating film, and said second conductive film, and such that a charge transfer status of said switching structure changes in response to a memory access command;
• and
• providing a microprocessor in communication with a plurality of said storage container structures via respective ones of a plurality of said bit line terminals.

A method of fabricating a computer system comprising the steps of:

• forming a storage container structure by
• providing a substrate including a semiconductor structure;
• forming a central patterning stop region;
• forming a pair of lateral patterning stop regions over a first surface of said substrate such that said lateral patterning stop regions form a substrate topography, said substrate topography including a central void positioned between said lateral patterning stop regions and over said central patterning stop region;
• forming an insulating overlayer over said first surface of said substrate and over said central and lateral patterning stop regions;
• patterning a container region within said insulating overlayer such that said container region defines a container cross section having an upper container portion and a lower container portion, such that said lower container portion is positioned within said central void, and such that said upper container portion is wider than said lower container portion;
• layering a first conductive film over an interior surface of said container region;
• layering an intermediate insulating film over an interior surface of said container region to define a back fill region such that said back fill region is bounded in part by an interior surface of said intermediate insulating film and such that said back fill region is positioned within said upper container portion;
• layering a second conductive film over said intermediate insulating film such that said second conductive film occupies said back fill region;
• patterning a contact region in said second conductive film such that said contact region occupies at least a portion of said upper container portion;
• and
• forming an electrical contact in said contact region such that respective portions of said electrical contact, said second conductive film, said intermediate insulating film, and said first conductive film occupy collectively at least a portion of said container region;
• coupling a bit line terminal to a charge storage lamina through a switching structure such that said charge storage lamina comprises said first conductive film, said intermediate insulating film, and said second conductive film, and such that a charge transfer status of said switching structure changes in response to a memory access command;
• and
• providing a microprocessor in communication with a plurality of said charge storage structures via respective ones of a plurality of said bit line terminals.

A method of fabricating a semiconductor device comprising the steps of:

• providing a substrate including a semiconductor structure;
• forming a patterning stop region;
• forming an insulating overlayer over a first surface of said substrate and over said patterning stop region, such that said insulating overlayer comprises a lower overlayer surface in contact with said substrate and said patterning stop region, an upper overlayer surface, and an intermediate overlayer portion defined between said lower overlayer surface and said upper overlayer surface;
• patterning a container region within said insulating overlayer by removing a portion of said upper overlayer surface, a portion of said intermediate overlayer portion, and a portion of said lower overlayer surface such that
• said container region defines a container cross section having container side walls, a container bottom wall, an upper container boundary, and a container interior bounded by said upper container boundary, said container side walls, and said container bottom wall,
• said upper container boundary is defined by said removed portion of said upper overlayer surface,
• said container side walls are defined by said insulating overlayer, and
• said container bottom wall is at least partially defined by a surface of said patterning stop region;
• layering a conductive film over an interior surface of said container region such that said conductive film includes a first film portion characterized by a first film thickness and a second film portion characterized by a second film thickness, such that said second film thickness is greater than said first film thickness, and such that said second film portion occupies at least a portion of said container interior;
• patterning a contact region in said second film portion of said conductive film such that said contact region extends into said container region;
• and
• forming an electrical contact in said contact region such that respective portions of said electrical contact and said conductive film occupy collectively at least a portion of said container region.

A method of fabricating a semiconductor device comprising the steps of:

• providing a substrate including a semiconductor structure;
• forming a patterning stop region such that said patterning stop region includes a central stop region, a first lateral stop region, and a second lateral stop region;
• forming an insulating overlayer over a first surface of said substrate and over said patterning stop region;
• patterning a container region within said insulating overlayer such that said container region defines a container cross section having a container bottom wall, a first side wall including a first upper side wall portion and a first lower side wall portion, and a second side wall including a second upper side wall portion and a second lower side wall portion, and such that
• said first upper side wall portion and said second upper side wall portion define an upper container portion therebetween,
• said first lower side wall portion and said second lower side wall portion define a lower container portion therebetween,
• said upper container portion is wider than said lower container portion,
• said container bottom wall is defined by said central stop region,
• said first lower side wall portion is defined by a lateral surface of said first lateral stop region, and
• said second lower side wall portion is defined by an opposite lateral surface of said second lateral stop region;
• layering a conductive film over an interior surface of said container region such that said conductive film occupies at least a portion of an upper side wall region positioned between said first and second upper side wall portions;
• patterning a contact region in said conductive film;
• and
• forming an electrical contact in said contact region such that respective portions of said electrical contact and said conductive film occupy collectively at least a portion of said container region.