Method of forming power semiconductor devices having insulated gate electrodes
AssigneeSamsung Electronics Co., Ltd.
InventorSeung-Joon Cha
Life of this patent
Estimating the term…
Loading patent…
AssigneeSamsung Electronics Co., Ltd.
InventorSeung-Joon Cha
Estimating the term…
Methods of forming power semiconductor devices include the steps of forming an insulated gate electrode on a face of semiconductor substrate containing a body region of first conductivity type (e.g., P-type) therein extending to the face. Using the gate electrode as a mask, a step is then performed to oxidize the body region and substrate at the face to form a first oxide layer. Source and drain region dopants are then implanted through the first oxide layer and into the body region and substrate to define recessed source and drain regions of second conductivity type therein, respectively. The step of implanting source and drain region dopants may be preceded by the step of etching the first oxide layer using an etching mask which covers the gate electrode. The step of oxidizing the body region and substrate may also be preceded by the step of forming nitride spacers on sidewalls of the gate electrode and then also using the nitride spacers as a mask during the oxidation step. These nitride spacers are then removed prior to performing the step of implanting the source and drain region dopants.
A method of forming a transistor, comprising the steps of:
A method of forming a lateral insulated-gate field effect transistor, comprising the steps of:
Dependencies are inferred from the claim text.