Data processing system having a trace mechanism and method therefor
AssigneeMotorola, Inc.
InventorsClaude Moughani, William C. Moyer, Taimur Aslam
Life of this patent
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Abstract
A data processing system (10) having an access protect unit (20) for tracing memory accesses. A trace bit (50) is associated with each page of memory and when set generates an interrupt signal on a first valid access to the page. The access protect unit (20) supports trace in both supervisor and user mode without the need for an emulation system or an on-chip emulator. Tracing is done without providing "backdoor" access to the central processing unit (CPU). The access protect unit (20) allows programmable memory segment tracing. Signature monitoring of memory accesses is accomplished by storing sequential memory segments in a plurality of registers.
Claims23
A data processing system, comprising:
- a central processing unit;
- a memory unit having a plurality of memory segments, a memory segment of the plurality of memory segments being accessible in response to receiving an address;
- and
- an access protection unit, coupled to the central processing unit, for receiving the address, and in response to a programmable trace bit being asserted, the access protection unit generating an interrupt and providing the interrupt to the central processing unit when accessing the memory segment corresponding to the address;
- wherein the programmable trace bit is independent of a validity of contents of the memory segment.
A data processing system, comprising:
- a central processing unit;
- a memory unit having a plurality of memory segments, a memory segment of the plurality of memory segments accessible in response to receiving an address;
- and
- an access protection unit, coupled to the central processing unit, for receiving the address, and in response to receiving programmable access attributes for defining access types, the access protection unit generating an interrupt and providing the interrupt to the central processing unit when a current address is not the same as a previous address and access attributes of the current address compare favorably with the programmable access attributes.
In a data processing system having a central processing unit and a memory unit, the memory unit having a plurality of memory segments, a method for tracing access to a memory segment of the plurality of memory segments, the method comprising the steps of:
- entering a supervisor mode of operation of the data processing system;
- enabling access tracing of the memory segment;
- switching the data processing system to a user mode of operation;
- determining that a user access to the memory segment is an allowable access type;
- determining that a trace bit corresponding to the memory segment is asserted;
- and
- generating an interrupt and providing the interrupt to the central processing unit.
In a data processing system having a central processing unit and a memory unit, the memory unit having a plurality of memory segments, a method for tracing access to a memory segment of the plurality of memory segments, the method comprising the steps of:
- storing first access attribute information;
- receiving second access attribute information;
- determining that the first access attribute information compares favorably with second access attribute information;
- storing a first address for the memory segment;
- receiving a second address;
- determining that first address is not the same as the second address;
- generating an interrupt;
- and
- providing the interrupt to the central processing unit, wherein the interrupt is for tracing the access.
Dependencies are inferred from the claim text.