Integrated circuit failure analysis using color voltage contrast

A method of detecting failures in an integrated circuit comprising the steps of:

• a. acquiring a first voltage contrast image of an integrated circuit operating under a first set of conditions;
• b. coupling the first voltage contrast image to a first color channel;
• c. acquiring a second voltage contrast image of the integrated circuit operating under second set of conditions;
• d. coupling the second voltage contrast image to a second color channel;
• e. acquiring a third voltage contrast image of the integrated circuit operating under a third set of conditions;
• f. coupling the third voltage contrast image to a third color channel whereby differences between the first voltage contrast image, the second voltage contrast image, and the third voltage contrast image are highlighted in color and whereby portions of the first voltage contrast image, the second voltage contrast image, and the third voltage contrast image having no differences are displayed in a black and white format.

A method of detecting failures in an integrated circuit comprising the steps of:

• a. acquiring a first voltage contrast image of a first integrated circuit operating under a first set of conditions;
• b. coupling the first voltage contrast image to a first color channel;
• c. acquiring a second voltage contrast image of the first integrated circuit operating under second set of conditions;
• d. coupling the second voltage contrast image to a second color channel;
• e. acquiring a third voltage contrast image of a second integrated circuit operating under a third set of conditions;
• f. coupling the third voltage contrast image to a third color channel whereby differences between the first voltage contrast image, the second contrast voltage image, and the third voltage contrast image are highlighted in color and whereby portions of the first voltage contrast image, the second voltage contrast image, and the third voltage contrast image having no differences are displayed in a black and white format.

A method of detecting failures in an integrated circuit comprising the steps of:

• a. acquiring a first fault contrast image of an integrated circuit operating under a first set of conditions;
• b. coupling the first fault contrast image to a first color channel;
• c. acquiring a second fault contrast image of the integrated circuit operating under second set of conditions;
• d. coupling the second fault contrast image to a second color channel;
• e. acquiring a third fault contrast image of the integrated circuit operating under a third set of conditions;
• f. coupling the third fault contrast image to a third color channel whereby differences between the first fault contrast image, the second fault voltage image, and the third fault contrast image are highlighted in color and whereby portions of the first fault contrast image the second fault contrast image, and the third fault contrast image having no differences are displayed in a black and white format.

A method of detecting failures in an integrated circuit comprising the steps of:

• a. acquiring a first fault contrast image of a first integrated circuit operating under a first set of conditions;
• b. coupling the first fault contrast image to a first color channel;
• c. acquiring a second fault contrast image of the first integrated circuit operating under second set of conditions;
• d. coupling the second fault contrast image to a second color channel;
• e. acquiring a third fault contrast image of a second integrated circuit operating under a third set of conditions;
• f. coupling the third fault contrast image to a third color channel whereby differences between the first fault contrast image, the second fault contrast image, and the third fault contrast image are highlighted in color and whereby portions of the first fault contrast image, the second fault contrast image, and the third fault contrast image having no differences are displayed in a black and white format.

An apparatus for detecting failures in an integrated circuit comprising:

• a. a microscope for forming a microscope image of the integrated circuit, the microscope image including information representative of a first condition of the integrated circuit;
• b. a camera for forming a camera image coupled to receive the microscope image from the microscope;
• and
• c. an image processor coupled to receive the camera image from the camera, the image processor having three color channels wherein the camera image is selectively coupled to one or two of the three color channels and wherein a second image representative of a second condition of the integrated circuit is coupled to the remaining channels of the three color channels whereby differences between the camera image and the second image are highlighted in color and whereby portions of the camera image and the second image having no differences are displayed in a black and white format.

An apparatus for detecting failures in an integrated circuit comprising:

• a. a microscope for forming a microscope image of the integrated circuit, the microscope image including information representative of a first condition of the integrated circuit;
• b. an image digitizer for forming a digitized image, the image digitizer coupled to receive the microscope image from the microscope;
• and
• c. an image processor coupled to receive the digitized image from the camera, the image processor having three color channels wherein the digitized image is selectively coupled to one or two of the three color channels and wherein a second image representative of a second condition of the integrated circuit is coupled to the other remaining channels of the three color channels whereby differences between the digitized image and the second image are highlighted in color and whereby portions of the digitized image and the second image having no differences are displayed in a black and white format.