Active matrix liquid crystal display having a contact hole
AssigneeLG Electronics Inc.
InventorsYoung-Jin Oh, Kyoung-nam Lim
Life of this patent
Estimating the term…
Abstract
An active matrix liquid crystal display (AMLCD) with a high aperture ratio and with an etch stopper formed by a back exposure method, and not with an additional pattern mask. The AMLCD has a gate line that extends in a first direction on the substrate and has a first region that corresponds to the gate electrode region. The gate line also has a second region corresponding to a non-gate electrode region and a contact hole adjacent to the first region and the second region. A thin film transistor (TFT) of the AMLCD is formed with a nonlinear channel region.
Claims15
An active matrix liquid crystal display (AMLCD) comprising:
- an insulating substrate;
- a gate line extending in a first direction on said substrate and having a first region corresponding to a gate electrode region, a second region corresponding to a non-gate electrode region, and a contact hole adjacent to said first region and said second region, said gate line exposing a portion of said substrate;
- a first insulating layer on said gate line;
- an island-shaped semiconductor active layer above and overlapping said first region and a portion of said contact hole of said gate line;
- an etch stopper on semiconductor active layer and exposing a portion of said semiconductor active layer;
- a data line on said substrate crossing said gate line and having a first protruding portion extending in said first direction above said first region of said gate line and connecting said exposed portion of said semiconductor active layer as a source electrode, and a second portion contiguous with said protruding portion, said first and second portions of said data line overlying said gate line;
- and
- a drain electrode disposed in correspondence with said source electrode.
An active matrix liquid crystal display (AMLCD) comprising:
- an insulating substrate;
- a gate line extending in a first direction on said substrate and having a first region corresponding to a gate electrode region, a second region corresponding to a non-gate electrode region, and a contact hole adjacent to said first region and said second region, said gate line exposing a portion of said substrate;
- a first insulating layer on said gate line;
- an island-shaped semiconductor active layer above and overlapping said first region and a portion of said contact hole of said gate line;
- a data line on said substrate crossing said gate line and having a first protruding portion extending in said first direction above said first region of said gate line and connecting said exposed portion of said semiconductor active layer as a source electrode of a thin film transistor (TFT), and a second portion contiguous with said protruding portion, said first and second portions of said data line overlying said gate line;
- and
- a drain electrode disposed in correspondence with said source electrode, said contact hole of said gate line providing that the R/C-type delay of said gate line and the turn-on time of said TFT are reduced.
An active matrix liquid crystal display (AMLCD) comprising:
- an insulating substrate;
- a gate line extending in a first direction on said substrate and having a first region corresponding to a gate electrode region, a second region corresponding to a non-gate electrode region, and a contact hole adjacent to said first region and said second region, said gate line exposing a portion of said substrate;
- a first insulating layer on said gate line;
- an island-shaped semiconductor active layer above and overlapping said first region and a portion of said contact hole of said gate line;
- an etch stopper on semiconductor active layer and exposing a portion of said semiconductor active layer;
- a data line on said substrate crossing said gate line and having a first protruding portion extending in said first direction above said first region of said gate line and connecting said exposed portion of said semiconductor active layer as a source electrode of a thin film transistor (TFT), and a second portion contiguous with said protruding portion, said first and second portions of said data line overlying said gate line;
- and
- a drain electrode disposed in correspondence with said source electrode, said contact hole of said gate line providing that the R/C-type delay of said gate line and the turn-on time of said TFT are reduced.
Dependencies are inferred from the claim text.