Dual loop delay-locked loop

A delay-locked loop for producing a local clock synchronized to a reference clock, the delay-locked loop comprising:

• a first delay circuit adapted to receive a reference clock, for delaying the reference clock by first and second adjustable delay periods to produce first and second intermediate clocks each having a same frequency as the reference clock, the first and second adjustable delay periods adjusted by a first delay control signal;
• a second delay circuit coupled to receive the first and second intermediate clocks from the first delay circuit, the second delay circuit for delaying one of the intermediate clocks by a third adjustable delay period to produce a local clock synchronized to the reference clock, the third adjustable delay period adjusted by a second delay control signal, the second delay circuit further for delaying each of the intermediate clocks by a fourth delay period to produce first and second feedback clocks;
• a first delay controller adapted to receive the reference clock and coupled to receive the first and second feedback clocks, and coupled to send the first delay control signal to the first delay circuit, for generating the first delay control signal wherein the first delay control signal adjusts the first and second adjustable delay periods to place a reference edge of the reference clock between a corresponding reference edge of the first feedback clock and a corresponding reference edge of the second feedback clock;
• and
• a second delay controller adapted to receive the reference clock and coupled to receive the local clock, and coupled to send the second delay control signal to the second delay circuit, for generating the second delay control signal in response to a relative phase between the reference clock and the local clock.

A method for producing a local clock synchronized to a reference clock comprising the steps of:

• receiving a reference clock;
• delaying the reference clock by first and second adjustable delay periods to produce first and second intermediate clocks;
• delaying one of the intermediate clocks by a third adjustable delay period to produce a local clock synchronized to the reference clock;
• delaying each of the intermediate clocks by a fourth delay period to produce first and second feedback clocks;
• and
• adjusting the first and second adjustable delay periods to place a reference edge of the reference clock between a corresponding reference edge of the first feedback clock and a corresponding reference edge of the second feedback clock.