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US 5,969,545 AGranted
Peak detector circuit
AssigneeMotorola, Inc.
InventorsKamran Assadian, Jeannie H. Kosiec
Life of this patent
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Abstract
A peak detector circuit (100) includes an output transconductance amplifier (102), a current rectifier (104) and an averaging circuit (108). The current rectifier includes an amplifier (115) which reduces input impedance of the current rectifier to increase the operating frequency of the peak detector circuit. An isolator (106) employs a current mirror (509) with a cascode transistor (512) having a bias potential which is dynamically adjusted to achieve accurate mirroring. An amplifier of a common mode feedback circuit (110) has improved linearity.
Claims11
A peak detector circuit comprising:
- an operational transconductance amplifier (OTA) having an input for receiving a differential input voltage, the OTA producing an OTA output signal including a differential output current in response to the input voltage, the differential output current including two currents of substantially opposite phase;
- a current rectifier coupled to the OTA which produces a signal in response to the differential output current, the current rectifier including
- two half wave rectifiers each having two input transistors each driven by the two currents of substantially opposite phase of the differential output current, and
- a differential amplifier coupled to the two input transistors and configured to reduce gate to source voltage of the input transistors which decreases input impedance of the two half wave rectifiers to increase operating frequency of the peak detector circuit;
- an isolator coupled to the current rectifier;
- and
- an averaging circuit coupled to the isolator, the averaging circuit producing an output signal having a signal value indicative of peak values of the differential input voltage.
4 more elements
An amplifier comprising:
- a pair of transistors configured to detect a differential input signal;
- bias current sources coupled to sources of the pair of transistors;
- a pair of resistors coupled between sources of the pair of transistors and an AC ground node;
- a bias current source coupled to the AC ground node and generating a substantially constant bias current;
- and
- a third transistor having a gate coupled to a reference potential, a source coupled to the AC ground node, a drain coupled to an output node of the amplifier and a load circuit;
- wherein the drains of the pair of transistors are coupled to the load circuit.
4 more elements
Dependencies are inferred from the claim text.