Thermal ink jet printheads with power MOS driver devices having enhanced transconductance
AssigneeXerox Corporation
InventorsWilliam G. Hawkins, Cathie J. Burke
Life of this patent
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Abstract
A high voltage MOS transistor, for use in a thermal ink jet printhead, is fabricated with a single, uniformly thick layer of polysilicon that serves as a field plate over the drift region and a gate over the channel region. The fabrication of the drift region and associated drift oxide is performed in a sequence independent of the device channel stop and field oxide fabrication, allowing the drift region to be optimized by varying the thickness of the drift oxide. Using a field plate to increase the breakdown voltage of the device by reducing the concentration of the electric field, the device transconductance is increased by increasing the doping of the drift region without an attendant decrease in breakdown voltage.
Claims8
A thermal inkjet printhead comprising:
- a silicon substrate having a surface;
- a plurality of MOS transistors, each of said plurality of MOS transistors located adjacently to another of said MOS transistors, each of said MOS transistors comprising,
- a) a drain region comprising a contact region formed in said substrate adjacent said surface and a drift region formed in said substrate adjacent to said contact region, said drift region being lateral to and in substantially non-subtending relation with said contact region;
- b) a source region substantially surrounding said drain region, said source region formed in said substrate adjacent to said surface, said source region defining with said drift region a channel region with the channel region being located between said source region and said drift region;
- c) an insulative layer present on said surface of said substrate, said drift region and the channel region subtending said insulative layer, a first portion of said insulative layer, subtended by said drift region, having a thickness greater than a second portion of said insulative layer, subtended by the channel region;
- d) a single polysilicon layer having a predetermined thickness and resistivity present on said insulative layer, said single polysilicon layer including a polysilicon field plate portion subtended by said first portion of said insulative layer, serving as a field plate, and a gate portion subtended by said second portion of said insulative layer, serving as a gate, whereby said polysilicon field plate portion provides for increased transconductance of said transistor without reducing breakdown voltage to minimize the spacing between said source region and said drain region;
- e) a drain contact contacting said contact region;
- and
- f) a source contact contacting said source region, said source contact spaced from said drain contact, extending laterally towards said drain contact no further than said polysilicon field plate portion;
- a plurality of heater elements, each of said heater elements connected to one of said plurality of MOS transistors;
- and
- a plurality of orifices for expelling ink droplets, each of said orifices operatively associated with one of said plurality of heater elements.
Dependencies are inferred from the claim text.