Circuit and method for gate-body structures in CMOS technology

A method of fabricating an inverter, the method comprising:

• forming a complementary pair of gate-body transistors, the complementary pair comprising a first channel type transistor and a second channel type transistor, and wherein forming each gate-body transistor comprises:
• forming a body region formed of single crystalline semiconductor material and extending outwardly from a substrate, the body region having an upper surface and opposing sidewalls;
• forming a source region within a portion of the upper surface of the body region;
• forming a drain region within a portion of the upper surface of the body region;
• forming a gate above the upper surface of the body region;
• and
• forming conductive sidewall members disposed adjacent to the opposing sidewalls of the body region;
• forming an electrical contact between drain regions of the complementary pair to provide an output for the inverter;
• and
• forming a gate contact to interconnect the gates of the complementary pair wherein the gate contact comprises an input to the inverter.

An information handling system comprising:

• a central processing unit;
• a random access memory;
• and
• a system bus for communicatively coupling the central processing unit and the random access memory, the random access memory (RAM) further including an inverter, the inverter further comprising:
• a complementary pair of gate-body transistors, the complementary pair comprising a first channel type transistor and a second channel type transistor, each gate-body transistor comprising:
• a body region formed of single crystalline semiconductor material and extending outwardly from a substrate, the body region having an upper surface and opposing sidewalls;
• a source region formed within a portion of the upper surface of the body region;
• A drain region formed within a portion of the upper surface of the body region;
• a gate formed above the upper surface of the body region;
• and
• conductive sidewall members disposed adjacent to the opposing sidewalls of the body region;
• an electrical contact between drain regions of the complementary pair to provide an output for the inverter;
• and
• a gate contact, the gate contact interconnecting the gates of the complementary pair wherein the gate contact comprises an input to the inverter.