Liquid crystal display device integrated with driving circuit and method for fabricating the same

A thin film transistor substrate integrated with a driver circuit for use in a liquid crystal display, the thin film transistor substrate comprising:

• a substrate, a surface of the substrate being divided into a pixel region and a driver region;
• a plurality of pixel driving thin film transistors formed in the pixel region, each of the plurality of pixel driving thin film transistors including a channel region formed of an amorphous semiconductor, source and drain regions in contact with the channel region and each formed of a polycrystalline semiconductor, and first and second transparent electrodes in contact with the source and drain regions, respectively;
• and
• a CMOS thin film transistor circuit formed in the driver region, including a P-type thin film transistor and an N-type thin film transistor, each of the P-type and N-type thin film transistors including a channel region formed of a polycrystalline semiconductor, source and drain regions in contact with the channel region and formed of a polycrystalline semiconductor, third and fourth transparent electrodes in contact with the source and drain regions, respectively, and source and drain electrodes in contact with the third and fourth transparent electrodes, respectively, the source and drain electrodes being connected to the source and drain regions through the third and fourth transparent electrodes, respectively.

A thin film transistor substrate integrated with a driver circuit for use in a liquid crystal display, the thin film transistor substrate comprising:

• a substrate, a surface of the substrate being divided into a pixel region and a driver region;
• a pixel driving thin film transistor in the pixel region, the pixel driving thin film transistor including a gate electrode, a gate insulating layer on the gate electrode, first and second transparent electrodes over the gate insulating layer, a channel region including a substantially intrinsic amorphous semiconductor over the gate insulating layer adjacent the gate electrode, and source and drain regions in contact with the channel region, the source and drain regions each including an N-type polycrystalline semiconductor and being connected the first and second transparent electrodes, respectively;
• an N-channel thin film transistor in a portion of the driver region, the N-channel thin film transistor including a gate electrode, a gate insulating layer over the gate electrode, source and drain electrodes each formed of a metal over the gate insulating layer adjacent the gate electrode, third and fourth transparent electrodes formed on the source and drain electrodes, respectively, a channel region including a substantially intrinsic polycrystalline semiconductor over the gate insulating layer adjacent the gate electrode, and source and drain regions each including an N-type polycrystalline semiconductor formed on the third and fourth transparent electrodes, respectively, the source and drain regions being in contact with the channel region;
• a P-channel thin film transistor in a portion of the driver region, the p-channel thin film transistor including a gate electrode, a gate insulating layer over the gate electrode, source and drain electrodes each formed of a metal over the gate insulating layer adjacent the gate electrode, fifth and sixth transparent electrodes formed on the source and drain electrodes, respectively, a channel region including a substantially intrinsic polycrystalline semiconductor over the gate insulating layer adjacent the gate electrode, and source and drain regions each including a P-type polycrystalline semiconductor formed on the fifth and sixth transparent electrodes, respectively, the source and drain regions being in contact with the channel region;
• and
• a passivation layer over each of the pixel driving thin film transistor, the P-channel thin film transistor, and the N-channel thin film transistor.