Method of making a multiple mushroom shape capacitor for high density DRAMs
AssigneeTexas Instruments - Acer Incorporated
InventorShye-Lin Wu
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AssigneeTexas Instruments - Acer Incorporated
InventorShye-Lin Wu
Estimating the term…
A new structure of a capacitor for a DRAM is disclosed herein. The structure of the capacitor includes a mushroom shape first storage node, a dielectric layer and a second storage node. The mushroom shape first storage node includes a base portion that is formed of polysilicon. A plurality of mushroom neck portions located on the base portion. A plurality of roof portions are connected on the tops of the mushroom neck portions. The dielectric layer is conformally covered the surface of the mushroom shape storage node. The second storage node encloses the surface of the dielectric layer. The formation of the mushroom shape capacitor includes forming a first conductive layer over a wafer. Then, an undoped hemispherical grains silicon (HSG-silicon) is formed on the first conductive layer. The HSG-silicon is separated along the grain boundaries to expose a portion of the first conductive layer. Next, the exposed first conductive layer is etched by using the HSG-silicon layer as a mask. A dielectric layer is then deposited on the exposed surface of the first conductive layers, and the HSG-silicon. A second conductive layer is formed over the dielectric layer.
A method for manufacturing a capacitor on a semiconductor wafer, wherein said semiconductor wafer includes a transistor formed thereon, said method comprising the steps of:
A method for manufacturing a capacitor on a semiconductor wafer, wherein said semiconductor wafer includes a transistor formed thereon, said method comprising the steps of:
Dependencies are inferred from the claim text.