Method of manufacturing MOS components having lightly doped drain structures

A manufacturing method for MOS components having lightly doped drains comprising:

• (a) providing a first conductivity type substrate having a plurality of gates and an insulating layer over the gates;
• (b) using the insulating layer and the gates as masks, doping the substrate with second conductivity type ions and forming a plurality of source/drain regions;
• (c) using the insulating layer and the gates as masks, doping the source/drain regions with first conductivity type ions at a tilt angle, while simultaneously rotating the substrate accordingly to form a plurality of lightly doped drain regions on opposite sides of the source/drain regions such that each of the lightly doped drain regions is adjacent to a different gate inside the source/drain regions;
• (d) forming a dielectric layer over the substrate and defining a pattern on the dielectric layer to form a plurality of spacers on two sides of some of the gates, and exposing some of the source/drain regions to form contact window openings;
• (e) forming a conducting layer over the substrate such that the conducting layer is electrically coupled with some of the exposed source/drain regions;
• and
• (f) defining a pattern on the conducting layer and forming contact windows to complete the fabrication of the MOS components.