Semiconductor device having an improved trench isolation and method for forming the same

A method for forming a trench isolation structure in a silicon region, said method comprising the steps of:

• forming a first insulation film on a top surface of a silicon region;
• selectively forming a trench groove extending vertically from said first insulation film to said silicon region so that a bottom of said trench groove lies below an interface between said first insulation film and said silicon region;
• forming a second insulation film which extends at least on vertical side walls and a bottom wall of said trench groove;
• selectively forming a polysilicon film on said second insulation film except on its upper portion so that said polysilicon film fills with said trench groove expect for its upper region;
• and
• forming an inter-layer insulator which resides not only on said first insulation film but also on said polysilicon film so that said inter-layer insulator fills up said upper region of said trench groove.

A method for forming a bipolar transistor with trench isolations comprising the steps of:

• forming a buried layer on a silicon substrate;
• forming an epitaxial layer on said buried layer;
• forming a first insulation film on a top surface of said epitaxial layer, said first insulation film comprising at least one thin film portion and at least two thick field oxide film portions sandwiching said at least one thin oxide film portion;
• selectively forming a base region in an upper region of said epitaxial layer and under said thin oxide film portion;
• selectively forming an emitter region in an upper region of said base region and an emitter plug electrode on said emitter region;
• selectively forming at least one trench groove extending vertically from said first insulation film through said epitaxial layer and said buried layer into said silicon substrate;
• and
• forming an inter-layer insulator both over said first insulation film and above said emitter plug electrode and within said trench groove so that said inter-layer insulator fills up said trench groove.

A method for forming a bipolar transistor with trench isolations comprising:

• forming a buried layer on a silicon substrate;
• forming an epitaxial layer on said buried layer;
• forming a first insulation film on a top surface of said epitaxial layer, said first insulation film comprising at least one thin oxide film portion and at least two thick field oxide film portions sandwiching said at least one thin oxide film;
• selectively forming a base region in an upper region of said epitaxial layer and under said at least one thin oxide film;
• selectively forming an emitter region in an upper region of said base region and an emitter plug electrode on said emitter region;
• selectively forming at least one trench groove extending vertically from said first insulation film through said epitaxial layer and said buried layer into said silicon substrate;
• forming a second insulation film which extend at least on vertical said walls and a bottom wall of said trench groove;
• selectively forming a polysilicon film on said second insulation film except on its upper portion so that said polysilicon film fills with said trench groove except for its upper region;
• and
• forming an inter-layer insulator which resides not only on said first insulation film but also on said polysilicon film so that said inter-layer insulator fills up said upper region of said trench groove.

A method for forming a MOS field effect transistor with a trench isolation comprising the steps of:

• forming an impurity doped well region on a silicon substrate;
• forming a first insulation film on a top surface of said impurity doped well region, said first insulation film comprising at least one thick field oxide film portion and at least two thin oxide film portions sandwiching said at least one thick field oxide film portion;
• selectively forming at least two gate electrodes on said at least two thin film portions;
• selectively forming source/drain diffusion regions in an upper region of said impurity doped well region and under each of said thin oxide film portions, said source/drain diffusion regions sandwiching each of at least two channel regions under said at least two gate electrodes;
• selectively forming a trench groove extending vertically from said thick field oxide film portion through said impurity doped well region into said silicon substrate;
• and
• forming an inter-layer insulator not only over said first insulation film and above said gate electrode but also within said trench groove so that said inter-layer insulator fills up said trench groove.

A method for forming a MOS field effect transistor with a trench isolation comprising the steps of:

• forming an impurity doped well region on a silicon substrate;
• forming a first insulation film on a top surface of said impurity doped well region, said first insulation film comprising at least one thick field oxide film portion and at least two thin oxide film portions sandwiching said at least one thick field oxide film portion;
• selectively forming at least two gate electrodes on said at least two thin film portions respectively;
• selectively forming source/drain diffusion regions in an upper region of said impurity doped well region and under each of said thin oxide film portions, said source/drain diffusion regions defining each of at least two channel regions under each of said at least two gate electrodes;
• selectively forming a trench groove extending vertically from said thick field oxide film portion through said impurity doped well region into said silicon substrate;
• selectively forming a second insulation film which extends at least on vertical side walls and a bottom wall of said trench groove;
• selectively forming a polysilicon film on said second insulation film except on its upper portion so that said polysilicon film fills with said trench groove except for its upper region;
• and
• forming an inter-layer insulator which resides not only on said first insulation film but also on said polysilicon film so that said inter-layer insulator fills up said upper region of said trench groove.