Apparatus, article of manufacture, method and system for simulating a mass-produced semiconductor device behavior

An article of manufacture, including computer readable medium having computer readable program code means embodied therein for modeling a mass-produced semiconductor device, comprising:

• (a) computer readable program code means for simulating a plurality of mass-produced semiconductor devices responsive to a plurality of process parameters, when the plurality of simulated mass-produced semiconductor devices have associated semiconductor device attributes;
• (b) computer readable program code means for calibrating the computer readable means for simulating a plurality of mass-produced semiconductors in response to actual semiconductor device attributes;
• (c) computer readable program code means for simulating a plurality of semiconductor device I/V curves in response to the semiconductor device attributes of the respective plurality of simulated mass-produced semiconductor devices;
• (d) computer readable program code means for calibrating the means for simulating a plurality of semiconductor device I/V curves in response to actual in the plurality of semiconductor device I/V curves.
• (e) computer readable program means for obtaining worst-case I/V curves in the plurality of semiconductor device I/V curves.

A method for predicting drain-to-source current versus drain-to-source voltage curves for a mass-produced semiconductor device, having a channel length and/or other fabrication-defined attributes, the mass-produced semiconductor device having a corresponding sample semiconductor device having a gate, source and drain, the method comprising the steps of:

• (a) simulating the process of manufacturing the mass-produced semiconductor device, responsive to a plurality of process parameters, to obtain a plurality of simulated semiconductor devices having associated fabrication-defined attributes;
• (b) simulating a plurality of semiconductor drain-to-source current versus drain-to-source voltage curves, responsive to associated fabrication defined attributes associated with respective simulated semiconductor devices in the plurality of simulated semiconductor devices;
• (c) obtaining worst-case drain-to-source current versus drain-to-source voltage curves for the mass-produced semiconductor device based on the plurality of simulated semiconductor drain-to-source current versus drain-to-source voltage curves;
• (d) extracting parameters from the worst-case drain-to-source current versus drain-to-source voltage curves;
• and,
• (e) inputting the parameters into a device simulator to obtain mass-produced semiconductor device worst-case fabrication-defined attributes.

A wafer fabrication and line monitoring system, comprising:

• (a) a mass-production line for processing a wafer having a semiconductor device;
• (b) a sample and measure device for 1) sampling process wafers through the mass-production line and for 2) measuring and storing semiconductor attributes and behavior;
• (c) a process simulator for outputting a plurality of simulated mass-produced semiconductor devices having associated attributes responsive to a plurality of simulated process parameters;
• (d) a device simulator for outputting a plurality of respective I/V curves responsive to the plurality of simulated semiconductor device attributes;
• (e) a statistical analyzer for identifying worst-case I/V curves in the plurality of I/V curves;
• and,
• (f) an expert controller, coupled to the statistical analyzer and mass production line, for responsively adjusting the settings of process parameters and/or the tolerance allowances of the process parameters within the worst-case I/V curves.

A method for modeling a mass-produced semiconductor device, comprising the steps of:

• (a) obtaining a plurality of simulated mass-produced semiconductor devices having a plurality of attributes responsive to a plurality of process parameters;
• (b) obtaining a plurality of simulated mass-produced semiconductor device behaviors responsive to the plurality of simulated mass-produced semiconductor devices;
• (c) obtaining a worst-case semiconductor device behavior in the plurality of simulated mass-produced semiconductor device behaviors;
• (d) extracting device parameters from the worst-case semiconductor device behavior;
• and,
• (e) obtaining a worst-case mass-produced semiconductor device behavior responsive to the device parameters.