Method and apparatus for noise burst detection in signal processors

An apparatus for noise burst detection in a signal processor,

• a first buffer means for receiving a digital signal to generate a first signal which is a delayed version of said digital signal;
• a second buffer means for receiving said first signal to generate a second signal which is a delayed version of said first signal;
• an exclusive-OR means, taking said first and second signals as inputs, for performing an exclusive-OR operation on said first and second signals and producing an output;
• a third buffer means for receiving the output of said exclusive-OR means to generate a third signal representing a result of the XOR operation on said first and second signals;
• a timer means for generating a series of control signals at a specified counting period;
• a counter means coupled to said third buffer means and said timer means, said counter means adding one to its count when said third signal is at a first logic state and maintaining the count at the current value when said third signal is at a second logic state,
• upon each appearance of said control signals from said timer means, said counter means transferring the current count as an output indicative of the zero-crossing rate of the received digital signal and then resetting the count to a base value;
• and
• a comparator means, coupled to said counter means, for comparing the output zero-crossing rate from said counter means with a preset threshold value, wherein,
• if the zero-crossing rate is greater than the preset threshold value, said comparator means exports an indication signal indicating that the received signal is noise.