# US 5,966,323 A · Low switching field magnetoresistive tunneling junction for high density arrays > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 5,966,323 A - Document ID: US5966323A - Status: Granted - Kind: A - Application number: 08/993,768 - Filed: 1997-12-18 - Granted: 1999-10-12 - Earliest claimed: 1997-12-18 - Assignees: Motorola, Inc. - Inventors: Eugene Chen; Mark Durlam; Saied N. Tehrani - Web page: https://patentgrep.com/patent/US5966323A ## CPC - G11C 11/161: {details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell} - G11C 11/1659: {Cell access} - G11C 11/1675: {Writing or programming circuits or methods} - G11C 11/5607: {using magnetic storage elements} - G11C 2211/5615: Multilevel magnetic memory cell using non-magnetic non-conducting interlayer, e.g. MTJ - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract A low switching field magnetoresistive tunneling junction memory cell including a first exchange coupled structure having a pair of magnetoresistive layers and an exchange interaction layer sandwiched therebetween so as to pin the magnetic vectors of the pair of layers anti-parallel, a second exchange coupled structure having a pair of magnetoresistive layers and an exchange interaction layer sandwiched therebetween so as to pin the magnetic vectors of the pair of layers anti-parallel, and electrically insulating material sandwiched between the first and second exchange coupled structures to form a magnetoresistive tunneling junction. Each of the first and second exchange coupled structures, and hence the memory cell, has no net magnetic moment. ## Claims ### Claim 1 A low switching field magnetoresistive tunneling junction memory cell comprising: a first exchange coupled multi-layer structure including a pair of magnetoresistive layers having an exchange interaction layer situated in parallel juxtaposition between the pair of magnetoresistive layers, the pair of magnetoresistive layers each having a magnetic vector and the magnetic vectors always being pinned anti-parallel by coupling of the exchange interaction layer; a second exchange coupled multi-layer structure including a pair of magnetoresistive layers having an exchange interaction layer situated in parallel juxtaposition between the pair of magnetoresistive layers, the pair of magnetoresistive layers each having a magnetic vector and the magnetic vectors always being pinned anti-parallel by coupling of the exchange interaction layer; and electrically insulating material situated in parallel juxtaposition between the first and second exchange coupled multi-layer structures to form a magnetoresistive tunneling junction. ### Claim 2 (depends on 1) A low switching field magnetoresistive tunneling junction memory cell as claimed in claim 1 wherein the first and second exchange coupled multi-layer structures each have a length/width ratio in a range of 1 to 5. ### Claim 3 (depends on 2) A low switching field magnetoresistive tunneling junction memory cell as claimed in claim 2 wherein the first and second exchange coupled multi-layer structures each have a top plan that is one of circular, diamond-shaped, or elliptical. ### Claim 4 (depends on 1) A low switching field magnetoresistive tunneling junction as claimed in claim 1 including in addition antiferromagnetic material positioned adjacent one of the first and second exchange coupled multi-layer structures so as to uni-directionally fix the magnetic vectors in the one of the exchange coupled multi-layer structures. ### Claim 5 (depends on 4) A low switching field magnetoresistive tunneling junction memory cell as claimed in claim 4 wherein the antiferromagnetic material includes FeMn, NiMn, IrMn, or combinations thereof. ### Claim 6 (depends on 1) A low switching field magnetoresistive tunneling junction memory cell as claimed in claim 1 including in addition flux closure material positioned to enclose exposed edges of the first exchange coupled multi-layer structure. ### Claim 7 (depends on 1) A low switching field magnetoresistive tunneling junction memory cell as claimed in claim 1 including in addition flux closure material positioned to enclose exposed edges of the second exchange coupled multi-layer structure. ### Claim 8 A high density array of low switching field magnetoresistive tunneling junction memory cells comprising: a substrate with a planar surface; and a plurality of interconnected low switching field magnetoresistive tunneling junction memory cells supported on the planar surface of the substrate and interconnected to form a memory array, each cell of the plurality of cells having an aspect ratio less than 5 and a top plan that is one of circular, diamond-shaped, or elliptical, each cell including a first exchange coupled multi-layer structure with no net magnetic moment including a pair of magnetoresistive layers having an exchange interaction layer situated in parallel juxtaposition between the pair of magnetoresistive layers, the pair of magnetoresistive layers each having a magnetic vector and the magnetic vectors always being pinned anti-parallel by coupling of the exchange interaction layer, a second exchange coupled multi-layer structure with near zero magnetic moment including a pair of magnetoresistive layers having an exchange interaction layer situated in parallel juxtaposition between the pair of magnetoresistive layers, the pair of magnetoresistive layers each having a magnetic vector and the magnetic vectors always being pinned anti-parallel by coupling of the exchange interaction layer, and electrically insulating material situated in parallel juxtaposition between the first and second exchange coupled multi-layer structures to form a magnetoresistive tunneling junction with near zero magnetic moment. ### Claim 9 (depends on 8) A high density array of low switching field magnetoresistive tunneling junction memory cells as claimed in claim 8 wherein the substrate includes a layer of antiferromagnetic material defining the planar surface and the plurality of interconnected low switching field magnetoresistive tunneling junction memory cells are positioned thereon so as to uni-directionally fix the magnetic vectors in an adjacent one of the exchange coupled multi-layer structures. ### Claim 10 (depends on 9) A high density array of low switching field magnetoresistive tunneling junction memory cells as claimed in claim 9 wherein the layer of antiferromagnetic material includes FeMn, NiMn, IrMn, or combinations thereof. ### Claim 11 (depends on 8) A high density array of low switching field magnetoresistive tunneling junction memory cells as claimed in claim 8 including in addition flux closure material positioned to enclose exposed edges of the first exchange coupled multi-layer structure in each cell of the plurality of cells. ### Claim 12 (depends on 8) A high density array of low switching field magnetoresistive tunneling junction memory cells as claimed in claim 8 including in addition flux closure material positioned to enclose exposed edges of the second exchange coupled multi-layer structure in each cell of the plurality of cells.