Back to results
US 5,966,317 AGranted
Shielded bitlines for static RAMs
AssigneeLucent Technologies Inc.
InventorKevin John O'Connor
Life of this patent
Estimating the term…
Abstract
With shrinking dimensions, and closely spaced runners, capacitive coupling between bitlines in dual port SRAMS becomes an important design issue. Techniques for reducing that coupling are described. A shielding runner placed between the read and write bitlines and tied to V.sub.DD or V.sub.SS substantially reduces unwanted crosstalk. Word lines can be similarly isolated.
Claims6
A memory cell with cell access lines in an x-y plane comprising:
- (a) a read wordline and a write wordline extending in an x-direction,
- (b) a pair of write bitlines and a pair of read bitlines extending in the y-direction, wherein at least one write bitline is adjacent a read bitline,
- (c) a shielding runner extending between said write bitline and said read bitline, and
- (d) means for connecting said shielding runner to a fixed potential.
1 more element
A memory cell with cell access lines in an x-y plane comprising:
- (a) at least one pair of bitlines extending in an x-direction,
- (b) a read word line and a write wordline extending in the y-direction,
- (c) a shielding runner extending between said read wordline and said write wordline, and
- (d) means for connecting said shielding runner to a fixed potential.
1 more element
Dependencies are inferred from the claim text.