US 5,966,306 AGranted

Method for verifying protocol conformance of an electrical interface

AssigneeMotorola, Inc.

InventorsMark H. Nodine, Harold M. Martin, Anhtu Nguyen

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Abstract

A method and technique for verifying bus protocol in the design of integrated circuits. A correctness evaluator receives simulation results from a monitor file and prediction information generated from protocol templates. The correctness evaluator operates according to a "clean bus" theory that an error includes those events not specified by the circuit specification, including spurious transitions. Protocol templates define the elements within the circuit, and are provided to a prediction generator which creates a prediction file. The correctness evaluator compares a simulation monitor file to the prediction file, and outputs a pass or fail result. The present invention offers a flexible method to separate protocol-defined timing constraints from implementation-dependent timing constraints. The present invention allows input from a test program to tailor bus signal change predictions and verify that the test program performs as it is programmed to perform.

Claims23

Dependent claims

A method for verifying conformance of a protocol for an electrical interface, the electrical interface having a plurality of signals, the method comprising the steps of:

selecting a test to be performed;
providing one of an electrical circuit having the electrical interface and a computer model of the electrical circuit having the electrical interface;
applying electrical stimulus to the one of the electrical circuit and the computer model of the electrical circuit;
providing a monitor to monitor the plurality of signals;
detecting a transition of at least one of the plurality of signals;
in response to said step of detecting, storing state and timing information of the at least one of the plurality of signals;
storing a plurality of protocol constraints within a protocol template;
deriving a prediction file from the test to be performed and the protocol template, the prediction file including the plurality of protocol constraints;
comparing the state and timing information of the at least one of the plurality of signals to the plurality of protocol constraints;
and
in response to said step of comparing, determining if the one of the electrical circuit and the computer model of the electrical circuit conform to the protocol for the electrical interface,
wherein the step of storing a plurality of protocol constraints within a protocol
template further comprises the step of:
representing the plurality of protocol constraints within a directed graph having a plurality of nodes,
wherein each one of the plurality of nodes has a first attribute characterization of OPTIONAL/REQUIRED,
and wherein at least one of the plurality of protocol constraints specifies a timing range.

13 more elements

Dependencies are inferred from the claim text.